
Le mardi 24 février 2015 à 16:57 -0600, Nishanth Menon a écrit :
omap_smc1 is now generic enough to remove duplicate omap3_gp_romcode_call logic that omap3 introduced.
As far as I could see, this did not introduce any regression on my omap3630 device (omap_smc1 is used from omap3_invalidate_l2_cache_secure in my case). Looks good to me.
As part of this change, move to using the generic lowlevel_init.S for omap3 as well.
Signed-off-by: Nishanth Menon nm@ti.com
arch/arm/cpu/armv7/omap-common/Makefile | 2 +- arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 2 ++ arch/arm/cpu/armv7/omap3/board.c | 6 ++---- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 11 ----------- arch/arm/include/asm/arch-omap3/sys_proto.h | 2 +- 5 files changed, 6 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 7695e16d36f5..f3725b267c99 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -28,7 +28,7 @@ endif
ifeq ($(CONFIG_OMAP34XX),) obj-y += boot-common.o -obj-y += lowlevel_init.o endif +obj-y += lowlevel_init.o
obj-y += mem-common.o diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S index 9b24369e4dc1..7d0f09496d85 100644 --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S @@ -16,11 +16,13 @@ #include <asm/arch/spl.h> #include <linux/linkage.h>
+#ifndef CONFIG_OMAP34XX ENTRY(save_boot_params) ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS str r0, [r1] bx lr ENDPROC(save_boot_params) +#endif
ENTRY(omap_smc1) PUSH {r4-r12, lr} @ save registers - ROM code may pollute diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7bb5f5..51abc4b09e36 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -418,8 +418,7 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits) acr |= set_bits;
if (get_device_type() == GP_DEVICE) {
omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_WRITE_ACR,
acr);
} else { struct emu_hal_params emu_romcode_params; emu_romcode_params.num_params = 1;omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_ACR, acr);
@@ -459,8 +458,7 @@ static void omap3_update_aux_cr(u32 set_bits, u32 clear_bits) static void omap3_invalidate_l2_cache_secure(void) { if (get_device_type() == GP_DEVICE) {
omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_L2_INVAL,
0);
} else { struct emu_hal_params emu_romcode_params; emu_romcode_params.num_params = 1;omap_smc1(OMAP3_GP_ROMCODE_API_L2_INVAL, 0);
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 78577b1d1c75..84591b8b5bab 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -27,17 +27,6 @@ ENTRY(save_boot_params) ENDPROC(save_boot_params) #endif
-ENTRY(omap3_gp_romcode_call)
- PUSH {r4-r12, lr} @ Save all registers from ROM code!
- MOV r12, r0 @ Copy the Service ID in R12
- MOV r0, r1 @ Copy parameter to R0
- mcr p15, 0, r0, c7, c10, 4 @ DSB
- mcr p15, 0, r0, c7, c10, 5 @ DMB
- .word 0xe1600070 @ SMC #0 to enter monitor - hand assembled
@ because we use -march=armv5
- POP {r4-r12, pc}
-ENDPROC(omap3_gp_romcode_call)
/*
- Funtion for making PPA HAL API calls in secure devices
- Input:
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h index bcf92fbe658b..c06605d533d3 100644 --- a/arch/arm/include/asm/arch-omap3/sys_proto.h +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h @@ -73,6 +73,6 @@ void power_init_r(void); void dieid_num_r(void); void get_dieid(u32 *id); void do_omap3_emu_romcode_call(u32 service_id, u32 parameters); -void omap3_gp_romcode_call(u32 service_id, u32 parameter); +void omap_smc1(u32 service, u32 val); u32 warm_reset(void); #endif