On Mon, 2015-04-13 at 12:55 -0600, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
On systems with caches enabled, NAND I/O may need to flush/invalidate the cache during read/write operations. For this to work correctly, all buffers must be cache-aligned. Fix nand_verify*() to allocate aligned buffers.
This prevents cache alignment warnings from being spewed when using U-Boot to write an updated version of itself to flash on NVIDIA Tegra Seaboard (after perturbation of stack/data layout in current u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed nand_verify_page_oob(); testing of that would be useful.
Cc: Peter Tyser ptyser@xes-inc.com Cc: Heiko Schocher hs@denx.de Cc: Scott Wood scottwood@freescale.com Fixes: 59b5a2ad83df ("nand: Add verification functions") Signed-off-by: Stephen Warren swarren@nvidia.com
drivers/mtd/nand/nand_util.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 12dd26a33fac..4e40952bf363 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -480,13 +480,11 @@ int nand_verify_page_oob(nand_info_t *nand, struct mtd_oob_ops *ops, loff_t ofs) int rval; struct mtd_oob_ops vops; size_t verlen = nand->writesize + nand->oobsize;
- ALLOC_CACHE_ALIGN_BUFFER(uint8_t, verbuf, verlen);
Isn't this a bit big for the stack? Especially if NAND page sizes continue to grow. Can you use memalign() instead?
-Scott