2015-02-21 15:00 GMT+01:00 Fabio Estevam festevam@gmail.com:
Hi Marco,
[Please keep the list on Cc.]
On Sat, Feb 21, 2015 at 11:13 AM, Marco Cavallini cavallini.koan@gmail.com wrote:
Hi Fabio, I moved to u-boot GIT master today (21 Feb 2015) I set up my DDR settings, defined the following: #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SYS_MXS_VDD5V_ONLY #define DEBUG
This is the output log which hangs with "Undefined Ins" What is missing?
SPL: Serial Console Initialised SPL: Initialising Power Block SPL: Switching CPU clock to 24MHz XTAL SPL: Setting auto-restart bit SPL: Setting VDDD 25mV below DC-DC converters SPL: Setting VDDA 25mV below DC-DC converters SPL: Setting VDDIO 25mV below DC-DC converters SPL: Starting 5V input detection comparator SPL: Starting battery voltage measurement logic SPL: Initialisating LRADC SPL: Enabling LRADC battery measurement SPL: LRADC channel 7 is present - configuring SPL: LRADC channel 7 configuration complete SPL: Configuring power source SPL: Pre-Configuring power block SPL: Battery Voltage = 752mV SPL: Battery Voltage = 752mV SPL: Battery Voltage = 4192mV SPL: Battery Voltage too high SPL: Configuring power block to boot from 5V input SPL: 5V VDD good SPL: Booting from 5V supply SPL: Powering up 4P2 regulator SPL: Configuring common 4P2 regulator params SPL: Enabling 4P2 regulator SPL: Charging 4P2 capacitor SPL: Disabling 4P2 DC-DC Input SPL: Setting 4P2 brownout level SPL: Battery Voltage = 0mV SPL: Switching DC-DC converters to 4P2 SPL: Enabling 4P2 DC-DC Input SPL: 4P2 regulator powered-up SPL: Switching CPU core clock source to PLL SPL: Initialising battery brown-out level to 3.0V SPL: Switching VDDD to DC-DC converters SPL: Enabling output rail protection SPL: Setting VDDIO to 3V3 (brownout @ 3v15) SPL: Setting VDDD to 1V5 (brownout @ 1v0) SPL: Initialising FRAC0 SPL: FRAC0 Initialised SPL: Configuring VDDA SPL: Initialising mx28 SDRAM Controller SPL: Setting mx28 board specific SDRAM parameters SPL: Applying SDRAM parameters SPL: Setting CPU and HBUS clock frequencies LLC Undefined Ins
Can you share your patch? What are the "Setting mx28 board specific SDRAM parameters" you did?
Also, how do you power your board? Are you using battery?
Hi Fabio, please apologize if I inadvertently sent the reply only to you.
I solved the problem setting in mx28_mem_init() the mDDR PINCTRLs
/* Set mDDR2 mode */ writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_mDDR, &pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set);
writel( PINCTRL_EMI_DS_CTRL_ADDRESS_MA_MASK | PINCTRL_EMI_DS_CTRL_CONTROL_MA_MASK | PINCTRL_EMI_DS_CTRL_DUALPAD_MA_MASK | PINCTRL_EMI_DS_CTRL_SLICE3_MA_MASK | PINCTRL_EMI_DS_CTRL_SLICE2_MA_MASK | PINCTRL_EMI_DS_CTRL_SLICE1_MA_MASK | PINCTRL_EMI_DS_CTRL_SLICE0_MA_MASK, &pinctrl_regs->hw_pinctrl_emi_ds_ctrl); /* 0x1b80 */
// Configure Bank-3 Pins 0-15 as EMI pins writel(0, &pinctrl_regs->hw_pinctrl_muxsel10); /* 0x1a0 */ writel(0, &pinctrl_regs->hw_pinctrl_muxsel11); /* 0x1b0 */ writel(0, &pinctrl_regs->hw_pinctrl_muxsel12); /* 0x1c0 */ writel(0, &pinctrl_regs->hw_pinctrl_muxsel13); /* 0x1d0 */
This is my boot log
SPL: Serial Console Initialised SPL: Initialising Power Block SPL: Switching CPU clock to 24MHz XTAL SPL: Setting auto-restart bit SPL: Setting VDDD 25mV below DC-DC converters SPL: Setting VDDA 25mV below DC-DC converters SPL: Setting VDDIO 25mV below DC-DC converters SPL: Starting 5V input detection comparator SPL: Starting battery voltage measurement logic SPL: Initialisating LRADC SPL: Enabling LRADC battery measurement SPL: LRADC channel 7 is present - configuring SPL: LRADC channel 7 configuration complete SPL: Configuring power source SPL: Pre-Configuring power block SPL: Battery Voltage = 976mV SPL: Battery Voltage = 976mV SPL: Battery Voltage = 4192mV SPL: Battery Voltage too high SPL: Configuring power block to boot from 5V input SPL: 5V VDD good SPL: Booting from 5V supply SPL: Powering up 4P2 regulator SPL: Configuring common 4P2 regulator params SPL: Enabling 4P2 regulator SPL: Charging 4P2 capacitor SPL: Disabling 4P2 DC-DC Input SPL: Setting 4P2 brownout level SPL: Battery Voltage = 0mV SPL: Switching DC-DC converters to 4P2 SPL: Enabling 4P2 DC-DC Input SPL: 4P2 regulator powered-up SPL: Switching CPU core clock source to PLL SPL: Initialising battery brown-out level to 3.0V SPL: Switching VDDD to DC-DC converters SPL: Enabling output rail protection SPL: Setting VDDIO to 3V3 (brownout @ 3v15) SPL: Setting VDDD to 1V5 (brownout @ 1v0) SPL: Initialising FRAC0 SPL: FRAC0 Initialised SPL: Configuring VDDA SPL: Initialising mx28 SDRAM Controller SPL: Setting mx28 board specific SDRAM parameters SPL: Applying SDRAM parameters SPL: Setting CPU and HBUS clock frequencies SPL: mxs_mem_init() completed SPL: mxs_mem_get_size() completed SPL: mxs_power_wait_pswitch() completed LLCinitcall: 40021d5c
U-Boot 2015.04-rc2-00015-g1320112-dirty (Feb 21 2015 - 16:07:30)
initcall: 40005e80 U-Boot code: 40002000 -> 40034F98 BSS: -> 4003F524 initcall: 40002a00 CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SD/MMC #0, 3V3 ...
Regards, -- Marco Cavallini | KOAN sas | Bergamo - Italia embedded and real-time software engineering Phone:+39-035-255.235 - Fax:+39-178-22.39.748 http://www.KoanSoftware.com