This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB.
Signed-off-by: Andreas Bießmann andreas.devel@googlemail.com Cc: Tom Rini trini@ti.com Cc: Ilya Yanok ilya.yanok@cogentembedded.com Cc: Scott Wood scottwood@freescale.com --- since v1: * minor comment changes
arch/arm/include/asm/arch-omap3/omap_gpmc.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/omap_gpmc.h b/arch/arm/include/asm/arch-omap3/omap_gpmc.h index 13efab0..6441281 100644 --- a/arch/arm/include/asm/arch-omap3/omap_gpmc.h +++ b/arch/arm/include/asm/arch-omap3/omap_gpmc.h @@ -23,6 +23,23 @@ #ifndef __ASM_ARCH_OMAP_GPMC_H #define __ASM_ARCH_OMAP_GPMC_H
+/* + * These GPMC_NAND_HW_BCHx_ECC_LAYOUT defines using the BCH library. + * The OOB layout was first defined by linx kernel in commit + * 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c, we have to reuse it here cause + * we want to be compatible. + */ +#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\ + .eccbytes = 56,\ + .eccpos = {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,\ + 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,\ + 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,\ + 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63},\ + .oobfree = {\ + {.offset = 2,\ + .length = 10 } } \ +} + /* GPMC CS configuration for an SMSC LAN9221 ethernet controller */ #define NET_LAN9221_GPMC_CONFIG1 0x00001000 #define NET_LAN9221_GPMC_CONFIG2 0x00060700