
Hi Sumit,
On Tue, Jul 12, 2022 at 12:42:12PM +0530, Sumit Garg wrote:
Add support for Qualcomm QCS404 SoC based evaluation board.
Features:
- Qualcomm Snapdragon QCS404 SoC
- 1GiB RAM
- 8GiB eMMC, uSD slot
U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qcs404.rst.
Signed-off-by: Sumit Garg sumit.garg@linaro.org
arch/arm/dts/Makefile | 1 + arch/arm/dts/qcs404-evb-uboot.dtsi | 24 +++++++ arch/arm/dts/qcs404-evb.dts | 81 ++++++++++++++++++++++++ arch/arm/mach-snapdragon/Kconfig | 11 ++++ arch/arm/mach-snapdragon/Makefile | 2 + arch/arm/mach-snapdragon/sysmap-qcs404.c | 31 +++++++++ board/qualcomm/qcs404-evb/Kconfig | 15 +++++ board/qualcomm/qcs404-evb/MAINTAINERS | 6 ++ board/qualcomm/qcs404-evb/Makefile | 6 ++ board/qualcomm/qcs404-evb/qcs404-evb.c | 33 ++++++++++ board/qualcomm/qcs404-evb/qcs404-evb.its | 64 +++++++++++++++++++ configs/qcs404evb_defconfig | 39 ++++++++++++ doc/board/qualcomm/index.rst | 1 + doc/board/qualcomm/qcs404.rst | 79 +++++++++++++++++++++++ include/configs/qcs404-evb.h | 27 ++++++++ 15 files changed, 420 insertions(+) create mode 100644 arch/arm/dts/qcs404-evb-uboot.dtsi create mode 100644 arch/arm/dts/qcs404-evb.dts create mode 100644 arch/arm/mach-snapdragon/sysmap-qcs404.c create mode 100644 board/qualcomm/qcs404-evb/Kconfig create mode 100644 board/qualcomm/qcs404-evb/MAINTAINERS create mode 100644 board/qualcomm/qcs404-evb/Makefile create mode 100644 board/qualcomm/qcs404-evb/qcs404-evb.c create mode 100644 board/qualcomm/qcs404-evb/qcs404-evb.its create mode 100644 configs/qcs404evb_defconfig create mode 100644 doc/board/qualcomm/qcs404.rst create mode 100644 include/configs/qcs404-evb.h
[...] diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts new file mode 100644 index 0000000000..4f0ae20bdb --- /dev/null +++ b/arch/arm/dts/qcs404-evb.dts @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Qualcomm QCS404 based evaluation board device tree source
- (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org
- */
+/dts-v1/;
+#include "skeleton64.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> +#include <dt-bindings/clock/qcom,gcc-qcs404.h>
+/ {
- model = "Qualcomm Technologies, Inc. QCS404 EVB";
- compatible = "qcom,qcs404-evb", "qcom,qcs404";
- #address-cells = <0x2>;
- #size-cells = <0x2>;
- chosen {
stdout-path = "serial0:115200n8";
- };
- aliases {
serial0 = &debug_uart;
- };
- memory {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
- };
- soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0x0 0x0 0x0 0xffffffff>;
compatible = "simple-bus";
pinctrl_north@1300000 {
compatible = "qcom,tlmm-qcs404";
reg = <0x1300000 0x200000>;
blsp1_uart2: uart {
pins = "GPIO_17", "GPIO_18";
function = "blsp_uart2";
};
};
I know you're just following the example of the existing Qualcomm boards here but I think we should really avoid adding any more custom device trees that are inconsistent with the official (upstream) Linux bindings.
Many other boards in U-Boot have moved to using the upstream Linux DTs as-is (with some additions in -u-boot.dtsi) and I think we should do the same for the Qualcomm boards. Judging from Tom's comments on other patches (e.g. [1]), this might even be a requirement now?
The SPMI fix I just sent for DB410c/DB820c [2] is a good example why it is important to have bindings consistent with Linux. Looking at your patch reminded me that I never sent this fix (thanks!).
Can you check how hard it would be to reuse the upstream QCS404 DT?
Thanks! Stephan
[1]: https://lore.kernel.org/u-boot/20220601152800.GJ25375@bill-the-cat/ [2]: https://lore.kernel.org/u-boot/20220713191711.4155-1-stephan@gerhold.net/