On Mon, Dec 16, 2019 at 2:06 PM Igor Opaniuk igor.opaniuk@gmail.com wrote:
From: Igor Opaniuk igor.opaniuk@toradex.com
Add info about supported i.MX7, improve details the usage of bcbonly subcommand.
Signed-off-by: Igor Opaniuk igor.opaniuk@toradex.com
Reviewed-by: Oleksandr Suvorov oleksandr.suvorov@toradex.com
arch/arm/mach-imx/cmd_nandbcb.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 9d3ed1aac3..334cc0766e 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -590,11 +590,14 @@ static char nandbcb_help_text[] = "update addr off|partition len - update 'len' bytes starting at\n" " 'off|part' to memory address 'addr', skipping bad blocks\n" "bcbonly fw-size fw1-off [fw2-off] - write only BCB (FCB and DBBT)\n"
" where `fw-size` is fw sizes in bytes, `fw1-off` and\n"" and `fw2-off` - firmware offsets ";
" where `fw-size` is fw sizes in bytes, `fw1-off`\n"" and `fw2-off` - firmware offsets\n"" FIY, BCB isn't erased automatically, so mtd erase should\n"" be called in advance before writing new BCB:\n"" > mtd erase mx7-bcb";#endif
U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb,
"i.MX6 Nand BCB",
"i.MX6/i.MX7 NAND Boot Control Blocks write", nandbcb_help_text);
2.17.1