Hi!
After extensive debugging, I found out that recent u-boot gets time very wrong (at least 1000 times too fast), and that was breaking all my attempts at getting networking to work.
...
I also reverted to old version of driver for debugging and probably broke a lot of stuff.
Anyway, below is patch you don't want to read, but that does the trick for me. Now that ethernet started to work, I'm sure I'll be able to strip it down to something reasonable.
Below is new version. Still not clean, but 1000 lines instead of 2200.
Below is new version, in case someone wants to test it. I'll split it and submit the relevant pieces...
Current issues:
1) ethernet address reading from i2c is not implemented.
2) I'm testing it when loaded in u-boot SPL loads u-boot loads u-boot config, not more usual config. I don't have physical access to that machine so changing MMC is hard/risky.
Pavel
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h index f564046..a6d1680 100644 --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h @@ -14,5 +14,7 @@ #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 +#define SOCFPGA_EMAC0_ADDRESS 0xff700000 +#define SOCFPGA_EMAC1_ADDRESS 0xff702000
#endif /* _SOCFPGA_BASE_ADDRS_H_ */ diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c index a960eb6..2214ab7 100644 --- a/board/altera/socfpga/socfpga_cyclone5.c +++ b/board/altera/socfpga/socfpga_cyclone5.c @@ -1,5 +1,6 @@ /* * Copyright (C) 2012 Altera Corporation <www.altera.com> + * Copyright (C) 2014 Pavel Machek, pavel@denx.de * * SPDX-License-Identifier: GPL-2.0+ */ @@ -7,7 +8,7 @@ #include <common.h> #include <asm/arch/reset_manager.h> #include <asm/io.h> - +#include <miiphy.h> #include <netdev.h>
DECLARE_GLOBAL_DATA_PTR; @@ -67,5 +68,11 @@ int overwrite_console(void) /* We know all the init functions have been run now */ int board_eth_init(bd_t *bis) { +#if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD) + /* initialize and register the emac */ + int rval = designware_initialize(CONFIG_EMAC_BASE, CONFIG_PHY_INTERFACE_MODE); + return rval; +#else return 0; +#endif } diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 0254249..c9c8e53 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -14,7 +14,9 @@ * High level configuration */ /* Virtual target or real hardware */ -#define CONFIG_SOCFPGA_VIRTUAL_TARGET +#undef CONFIG_SOCFPGA_VIRTUAL_TARGET + +#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ARMV7 #define CONFIG_SYS_DCACHE_OFF @@ -133,7 +135,8 @@ "qspirootfstype=jffs2\0" \ "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ - "bootm ${loadaddr} - ${fdt_addr}\0" + "bootm ${loadaddr} - ${fdt_addr}\0" \ + "ethaddr=12:23:34:46:56:60\0"
/* using environment setting for stdin, stdout, stderr */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV @@ -180,7 +183,7 @@ #else #define V_NS16550_CLK 100000000 #endif -#define CONFIG_BAUDRATE 115200 +#define CONFIG_BAUDRATE 57600
/* * FLASH @@ -206,6 +209,38 @@ #define CONFIG_ENV_IS_NOWHERE
/* + * network support + */ +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET +#define CONFIG_DESIGNWARE_ETH 1 +#endif + +#ifdef CONFIG_DESIGNWARE_ETH +#define CONFIG_EMAC0_BASE SOCFPGA_EMAC0_ADDRESS +#define CONFIG_EMAC1_BASE SOCFPGA_EMAC1_ADDRESS +/* console support for network */ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +/* designware */ +#define CONFIG_NET_MULTI +#define CONFIG_DW_ALTDESCRIPTOR +#define CONFIG_DW_SEARCH_PHY +#define CONFIG_MII +#define CONFIG_PHY_GIGE +#define CONFIG_DW_AUTONEG +#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ) +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +/* EMAC controller and PHY used */ +#define CONFIG_EMAC_BASE CONFIG_EMAC1_BASE +#define CONFIG_EPHY_PHY_ADDR CONFIG_EPHY1_PHY_ADDR +#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII +#endif /* CONFIG_DESIGNWARE_ETH */ + +/* * SPL "Second Program Loader" aka Initial Software */
diff --git a/lib/time.c b/lib/time.c index 73c3b6a..7ac00e9 100644 --- a/lib/time.c +++ b/lib/time.c @@ -15,7 +15,7 @@ #endif
#ifndef CONFIG_WD_PERIOD -# define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default*/ +# define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default */ #endif
DECLARE_GLOBAL_DATA_PTR; @@ -55,7 +55,9 @@ static unsigned long long notrace tick_to_time(uint64_t tick) { unsigned int div = get_tbclk();
- tick *= CONFIG_SYS_HZ; + do_div(tick, 1000); + do_div(tick, 20); + // tick /= CONFIG_SYS_HZ; do_div(tick, div); return tick; } diff --git a/net/bootp.c b/net/bootp.c index 189a003..fdb97cb 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -605,7 +605,7 @@ BootpRequest(void) int extlen, pktlen, iplen; int eth_hdr_size; #ifdef CONFIG_BOOTP_RANDOM_DELAY - ulong i, rand_ms; + ulong rand_ms; #endif
bootstage_mark_name(BOOTSTAGE_ID_BOOTP_START, "bootp_start"); @@ -623,8 +623,7 @@ BootpRequest(void) rand_ms = rand() >> 19;
printf("Random delay: %ld ms...\n", rand_ms); - for (i = 0; i < rand_ms; i++) - udelay(1000); /*Wait 1ms*/ + mdelay(rand_ms);
#endif /* CONFIG_BOOTP_RANDOM_DELAY */
diff --git a/net/eth.c b/net/eth.c index 99386e3..b72ae84 100644 --- a/net/eth.c +++ b/net/eth.c @@ -179,10 +179,12 @@ int eth_write_hwaddr(struct eth_device *dev, const char *base_name, dev->name); }
- if (dev->write_hwaddr && - !eth_mac_skip(eth_number)) { - if (!is_valid_ether_addr(dev->enetaddr)) + if (dev->write_hwaddr && !eth_mac_skip(eth_number)) { + if (!is_valid_ether_addr(dev->enetaddr)) { + printf("\nError: %s ethernet address not valid: %pM\n", + dev->name, dev->enetaddr); return -1; + }
ret = dev->write_hwaddr(dev); }