Re: [PATCH v3 01/12] pci: xilinx: Handle size of ecam region properly

On 5/17/24 20:14, Jiaxun Yang wrote:

Probe size of ecam from devicetree properly and cap accessible bus number accorading to ecam region size to ensure we don't go beyond hardware address space.

Also disable all interrupts to ensure errors are handled silently.

Signed-off-by: Jiaxun Yang jiaxun.yang@flygoat.com

drivers/pci/pcie_xilinx.c | 53 +++++++++++++++++++++++++++++++++++------------ 1 file changed, 40 insertions(+), 13 deletions(-)

Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com