On Tue, Jun 12, 2018 at 04:58:34PM -0500, Nishanth Menon wrote:
On 21:40-20180612, Russell King - ARM Linux wrote: [...]
I started respinning the series, while there is definitely a use of implementing in u-boot, I am starting to wonder if we should also be doing this in kernel.
How does the kernel set the bit when the kernel is running in non-secure mode, when the ACTLR is read-only in that mode?
For OMAP5/DRA7 SMP systems, I just posted a patch that seems to resolve it: https://patchwork.kernel.org/patch/10461273/
This'd be similar in implementation to ARM erratum 801819 workaround that needs two pieces (u-boot + kernel). I am not really worried about OMAP5/DRA7 since they should'nt loose context in Low power modes. Other SoCs need to be aware of the constraints.
/me wishes PSCI was a standard during ARMv7, but it was'nt... So legacy v7 SoCs have implementations that are kind of different (even smc calling conventions vary).
It may seem to be an easy way out (do everything in the kernel) but have you considered that the secure world is also vulnerable?
If the IBE bit is not set in the secure world, then the secure world is not implementing the workarounds, and therefore the non-secure world has the possibility to use the Spectre vulnerabilities to exploit the secure world with enough effort and knowledge.
You really need to _also_ fix these vulnerabilities in the secure world, which includes setting the IBE bit there.