Enable the utilization of mt35xu512aba_fixups for ISSI octal flash to operate in DDR mode.
Signed-off-by: Tejas Bhumkar tejas.arvind.bhumkar@amd.com --- drivers/mtd/spi/spi-nor-core.c | 10 +++++++++- drivers/mtd/spi/spi-nor-ids.c | 4 ++-- 2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f1dbeb4725..27579cbf15 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3977,7 +3977,7 @@ static struct spi_nor_fixups s28hx_t_fixups = { }; #endif /* CONFIG_SPI_FLASH_S28HX_T */
-#ifdef CONFIG_SPI_FLASH_MT35XU +#if defined(CONFIG_SPI_FLASH_MT35XU) || defined(CONFIG_SPI_FLASH_ISSI) static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor) { struct spi_mem_op op; @@ -4348,6 +4348,14 @@ void spi_nor_set_fixups(struct spi_nor *nor) } #endif
+#if defined(CONFIG_SPI_FLASH_ISSI) + if (!strcmp(nor->info->name, "is25wx256") || + !strcmp(nor->info->name, "is25lx512")) { + nor->fixups = &mt35xu512aba_fixups; + return; + } +#endif + #if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX) nor->fixups = ¯onix_octal_fixups; #endif /* SPI_FLASH_MACRONIX */ diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index f8ef87783e..c5c46c1a0c 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -239,9 +239,9 @@ const struct flash_info spi_nor_ids[] = { { INFO("is25wp01g", 0x9d701b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("is25wx256", 0x9d5b19, 0, 128 * 1024, 256, - SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP) }, { INFO("is25lx512", 0x9d5a1a, 0, 64 * 1024, 1024, - SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB) }, + SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ /* Macronix */