On Wednesday, October 08, 2014 at 03:18:10 PM, Dinh Nguyen wrote:
Hi Marek,
Hi all!
On 10/7/14, 7:45 AM, Marek Vasut wrote:
Hey,
given that we now have most of the u-boot socfpga stuff in mainline, I decided it would be a good idea to list what we're still missing and we should also decide how to move on now.
Thanks for all of your hard work on this!
I only did what needed to be done and I'm looking forward to you taking over shortly ;-)
[...]
SPL: This is something we still miss from mainline. We will need to discuss
this thoroughly, but one thing is obvious already -- we need to figure out how to interoperate with Quartus resp. the bsp-editor generated header files to assemble the SPL properly.Have you or anyone else already started on this work? If not, then this is an area that I can start to work on.
No, noone did and I'd be really happy if you took this one.
USB: This is scheduled for the next merge window. The DWC2 driver is cleaned
up and seems to be in rather good state. The USB driver currently resides in [2]EPCQ: This is something I prepared and tested real quick. The EPCS/EPCQ SPI NOR
can be operated via the Altera SPI driver, which is currently unused at all and thus suffering bitrot. The current cleanup is here [3]NET: Does the SoCDK use EMAC0 or EMAC1 ? I believe we still have this issue
open, I recall Chin was complaining about this.The SoCDK is using EMAC1.
I guess we'd need one more quick patch for current mainline then, since this seems to be broken ever since. I will bake one shortly.
Also, let me add two more goals: - Migrate to driver model - Support probing of the whole board from Device Tree Blob
This would make our lives so much easier, so we should aim for this. I don't know if it is realistic to make this happen for 2015.01, but I would like to keep this in mind.
Best regards, Marek Vasut