29 Oct
2015
29 Oct
'15
5:06 a.m.
Hi Wenyou,
On 10/28/2015 13:25 PM, Yang, Wenyou wrote:
@@ -173,3 +174,67 @@ void at91_periph_clk_disable(int id)
writel(regval, &pmc->pcr); }
+void at91_enable_periph_generated_clk(u32 id) {
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- u32 regval, status;
- u32 timeout = 1000;
- if (id > AT91_PMC_PCR_PID_MASK)
return;- writel(id, &pmc->pcr);
- regval = readl(&pmc->pcr);
- regval &= ~AT91_PMC_PCR_GCKCSS;
- regval &= ~AT91_PMC_PCR_GCKDIV;
- regval |= AT91_PMC_PCR_GCKCSS_PLLA_CLK |
AT91_PMC_PCR_CMD_WRITE |AT91_PMC_PCR_GCKDIV_(1) |AT91_PMC_PCR_GCKEN;You hard code the GCKCSS and GCKDIV. Would it be OK for all peripheral which need this kind of clock? Can you make it as a parameter?
As you know, our use-case is not complex, it is only used for one or two peripherals for now, So to make it simple, use hard-code.
Maybe we will improve it in the future, but now it is enough.
I think if this can be dealt now, that will be better.
Anyway, thank you for your advice.
You are welcome.
Best Regards, Bo Shen