Hi Tim,
2021年4月17日(土) 7:35 Tim Harvey tharvey@gateworks.com:
On Fri, Apr 16, 2021 at 3:30 PM Masami Hiramatsu masami.hiramatsu@linaro.org wrote:
Hi Tim,
Thanks for picking it up. I'll drop this patch from the next version.
Thank you,
2021年4月17日(土) 6:53 Tim Harvey tharvey@gateworks.com:
From: Masami Hiramatsu masami.hiramatsu@linaro.org
Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus.
Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu masami.hiramatsu@linaro.org
drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index dfd54b339f..f463ef3550 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -646,6 +646,9 @@ int dm_pci_hose_probe_bus(struct udevice *bus) return log_msg_ret("probe", ret); }
if (!ea_pos)sub_bus = pci_get_bus_max();dm_pciauto_postscan_setup_bridge(bus, sub_bus); return sub_bus;-- 2.17.1
Masami,
I'm not a maintainer, I just re-posted it. I do need this fix for my Gateworks Ventana driver-model conversion completion however so I put it in my series as well. Hopefully 'someone' will pick it up :)
I got it. Anyway I can refer to this on the ML archive, so I'll point to this from the next version. Mine was not sent to ML because of my poor typo :(
Thank you!
Tim