Hi Tom,
Thanks for your comments.
On Thu, Feb 25, 2010 at 15:24, Tom Tom.Rix@windriver.com wrote:
Anders Darander wrote:
From: Anders Darander ad@datarespons.se --- a/cpu/arm926ejs/at91/cpu.c +++ b/cpu/arm926ejs/at91/cpu.c @@ -31,6 +31,11 @@ #define AT91_MAIN_CLOCK 0 #endif +/* The at91sam9260 has 4 GPBR (0-3), we'll use the last one, nr 3,
- to keep track of the bootcount. */
multi-line comments are /* *Comment lines */
Correct, I'll fix this.
+#define AT91_GPBR_BOOTCOUNT_REGISTER 3 +#define AT91_BOOTCOUNT_ADDRESS (AT91_GPBR + 4*AT91_GPBR_BOOTCOUNT_REGISTER)
int arch_cpu_init(void) { return at91_clock_init(AT91_MAIN_CLOCK); @@ -52,3 +57,26 @@ int print_cpuinfo(void) return 0; } #endif
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+void bootcount_store (ulong a) +{
- volatile ulong *save_addr =
- (volatile ulong *)(AT91_BASE_SYS +
AT91_BOOTCOUNT_ADDRESS);
- *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | a;
implied length of a is 16 bits. the parameter type passed in should be explicitly cast/masked to u16.
Correct, I'll fix this.
I see sharing the 32 bits this way is how mpc5xxx does it..
But
mpc8260, mpc83xx, mpc8xx, ppc4xx, ipx store the bootcount_magic and the parameter as 2 32bit values.
Is there a memory limitation on why you can not follow what most of the others are doing ? If there is, please add the explanation as a comment.
Well, I think I'd prefer to keep the boocount and the magic to share a 32-bit register; the main reason being that the AT91SAM9260 only has 4 GPBR, i.e. only four registers that keep it's data between resets. I'll add a comment about this.
Best regards, Anders