Hi Peter,
On 8 July 2015 at 09:57, Peter Griffin peter.griffin@linaro.org wrote:
This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
Reviewed-by: Simon Glass sjg@chromium.org
(see nit below - this could be moved to device tree once you have it)
arch/arm/include/asm/arch-hi6220/dwmmc.h | 8 +++++ drivers/mmc/Makefile | 1 + drivers/mmc/hi6220_dw_mmc.c | 56 ++++++++++++++++++++++++++++++++ 3 files changed, 65 insertions(+) create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h create mode 100644 drivers/mmc/hi6220_dw_mmc.c
diff --git a/arch/arm/include/asm/arch-hi6220/dwmmc.h b/arch/arm/include/asm/arch-hi6220/dwmmc.h new file mode 100644 index 0000000..c747383 --- /dev/null +++ b/arch/arm/include/asm/arch-hi6220/dwmmc.h @@ -0,0 +1,8 @@ +/*
- (C) Copyright 2015 Linaro
- Peter Griffin peter.griffin@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width); diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index ed73687..81a1a8f 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o obj-$(CONFIG_DWMMC) += dw_mmc.o obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o +obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c new file mode 100644 index 0000000..106f673 --- /dev/null +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -0,0 +1,56 @@ +/*
- (C) Copyright 2015 Linaro
- peter.griffin peter.griffin@linaro.org
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <dwmmc.h> +#include <malloc.h> +#include <asm-generic/errno.h>
+#define DWMMC_MAX_CH_NUM 4
+#define DWMMC_MAX_FREQ 50000000 +#define DWMMC_MIN_FREQ 378000
+/* Source clock is configured to 100Mhz by ATF bl1*/
nit: MHz
+#define MMC0_DEFAULT_FREQ 100000000
+static int hi6220_dwmci_core_init(struct dwmci_host *host, int index) +{
host->name = "HiKey DWMMC";host->dev_index = index;/* Add the mmc channel to be registered with mmc core */if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {printf("DWMMC%d registration failed\n", index);return -1;}return 0;+}
+/*
- This function adds the mmc channel to be registered with mmc core.
- index - mmc channel number.
- regbase - register base address of mmc channel specified in 'index'.
- bus_width - operating bus width of mmc channel specified in 'index'.
- */
+int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width) +{
struct dwmci_host *host = NULL;host = calloc(1, sizeof(struct dwmci_host));if (!host) {error("dwmci_host malloc fail!\n");return -ENOMEM;}host->ioaddr = (void *)regbase;host->buswidth = bus_width;host->bus_hz = MMC0_DEFAULT_FREQ;return hi6220_dwmci_core_init(host, index);+}
1.9.1
Regards, Simon