
30 Sep
2011
30 Sep
'11
3:02 p.m.
Hi Ondrej Kupka
On 30/09/11 21:06, Ondra Kupka wrote:
Hello,
I've been digging a bit in X86 bootstart asm code and found possibly wrong code, as far as I understand:
In u-boot/arch/x86/cpu/start.S, there is piece of code to disable caches:
/* Turn of cache (this might require a 486-class CPU) */ movl %cr0, %eax orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 wbinvd
, which perfectly makes sense to me. What doesn't really make sense then is:
/* Turn of cache (this might require a 486-class CPU) */ movl %cr0, %eax orl $(X86_CR0_NW & X86_CR0_CD), %eax - AND HERE??? movl %eax, %cr0 wbinvd
in start16.S of the same directory.
Is is wrong or not?
Nice catch :) At least one of them is wrong - I'll sort out a patch (unless you want to submit a patch yourself that is)
Thanks a lot, Ondrej Kupka
Thank you
Regards,
Graeme