CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method to set I/O to 1.8. To boards that does not support vqmmc-supply, use vs18_enable in fsl_esdhc_cfg. If regulator is supported, use fixed 1.8V regulator for vqmmc-supply.
Signed-off-by: Peng Fan peng.fan@nxp.com Cc: Jaehoon Chung jh80.chung@samsung.com Cc: York Sun york.sun@nxp.com Cc: Stefano Babic sbabic@denx.de ---
V4: Merge patch 3/4 and patch 4/4 of V3 patch set.
board/warp/warp.c | 2 +- doc/README.fsl-esdhc | 2 -- drivers/mmc/fsl_esdhc.c | 4 ---- include/configs/warp.h | 1 - scripts/config_whitelist.txt | 1 - 5 files changed, 1 insertion(+), 9 deletions(-)
diff --git a/board/warp/warp.c b/board/warp/warp.c index 0bc0a6a..b1b528a 100644 --- a/board/warp/warp.c +++ b/board/warp/warp.c @@ -62,7 +62,7 @@ static void setup_iomux_uart(void) }
static struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC2_BASE_ADDR}, + {USDHC2_BASE_ADDR, 0, 0, 0, 1}, };
int board_mmc_getcd(struct mmc *mmc) diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc index 7e71387..29cc661 100644 --- a/doc/README.fsl-esdhc +++ b/doc/README.fsl-esdhc @@ -20,5 +20,3 @@ Freescale esdhc-specific options - CONFIG_SYS_FSL_ESDHC_BE ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined by ESDHC IP's endian mode or processor's endian mode. - - - CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V. diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 5e320e0..a65a465 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -672,10 +672,6 @@ static int esdhc_init(struct mmc *mmc) /* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
-#ifdef CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); -#endif - if (priv->vs18_enable) esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT);
diff --git a/include/configs/warp.h b/include/configs/warp.h index afe3eae..e3f79b1 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -23,7 +23,6 @@
/* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_SUPPORT_EMMC_BOOT
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2126a88..7bdf33a 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3762,7 +3762,6 @@ CONFIG_SYS_FSL_ERRATUM_A_004934 CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_FSL_ESDHC_BE CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE CONFIG_SYS_FSL_ESDHC_LE CONFIG_SYS_FSL_ESDHC_NUM