Hi Marek,
On 5/17/19 12:10 AM, Lukasz Majewski wrote:
This commit extends the struct clk to provide information regarding the clock rate. As a result the clock tree traversal is performed at most once, and further reads are using the cached value.
Signed-off-by: Lukasz Majewski lukma@denx.de
Changes in v4:
- None
Changes in v3: None
include/clk.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/include/clk.h b/include/clk.h index a909b71f1a..1f2fd15bb5 100644 --- a/include/clk.h +++ b/include/clk.h @@ -40,6 +40,7 @@ struct udevice;
- other clock APIs to identify which clock signal to operate upon.
- @dev: The device which implements the clock signal.
- @rate: The clock rate (in HZ).
- @id: The clock signal ID within the provider.
- @data: An optional data field for scenarios where a single
integer ID is not
sufficient. If used, it can be populated throughan .of_xlate op and @@ -55,6 +56,7 @@ struct udevice; */ struct clk { struct udevice *dev;
- unsigned long rate; /* in HZ */
Can this be unsigned long long ? Think of 3 GHz PLL on arm32 in IDT Versaclock line of clock synthesisers ; this would overflow right here.
Thanks for spotting this - I will use unsigned long long instead.
Best regards,
Lukasz Majewski
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