From: Dinh Nguyen dinguyen@opensource.altera.com
Hi,
This is another round of patches for the Arria10 device. There are still some build failures that related to the clocking, FPGA manager, and bridge support.
Thanks,
Dinh Nguyen (6): arm: socfpga: wrap system manager functions for A5/C5 devices arm: socfpga: add reset manager defines for Arria10 arm: socfpga: arria10: update dwmac reset function to support Arria10 arm: socfpga: arria10: don't build GEN5 sdram for arria10 arm: socfpga: arria10 fpga does not have bridges mapped arm: socfpga: arria10: remove board_init and s_init
.../arm/mach-socfpga/include/mach/system_manager.h | 1 + arch/arm/mach-socfpga/misc.c | 20 ++++ arch/arm/mach-socfpga/system_manager.c | 2 + board/altera/arria10-socdk/socfpga.c | 17 ---- drivers/Kconfig | 2 + drivers/ddr/Kconfig | 1 + drivers/ddr/altera/Kconfig | 6 ++ drivers/fpga/socfpga.c | 2 + include/configs/socfpga_common.h | 5 - include/dt-bindings/reset/altr,rst-mgr-a10.h | 103 +++++++++++++++++++++ 10 files changed, 137 insertions(+), 22 deletions(-) create mode 100644 drivers/ddr/Kconfig create mode 100644 drivers/ddr/altera/Kconfig create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h