- Each MPP functionality can be configuration by a 4bit value
- of MPP control reg, the value and associated functionality is SoC
- varient dependent
- */
+#define MV88F6281GTW_GE_MPP0_7 0x01112222 +#define MV88F6281GTW_GE_MPP8_15 0x11103311 +#define MV88F6281GTW_GE_MPP16_23 0x00001111 +#define MV88F6281GTW_GE_MPP24_31 0x22222222 +#define MV88F6281GTW_GE_MPP32_39 0x40440222 +#define MV88F6281GTW_GE_MPP40_47 0x00004444 +#define MV88F6281GTW_GE_MPP48_55 0x00000000
could you use a more details macros and I think we can use a device init framework to simply it
+#endif /* __MV88F6281GTW_GE_H */ diff --git a/include/configs/mv88f6281gtw_ge.h b/include/configs/mv88f6281gtw_ge.h new file mode 100644 index 0000000..6ec59f7 --- /dev/null +++ b/include/configs/mv88f6281gtw_ge.h @@ -0,0 +1,180 @@ +/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Prafulla Wadaskar prafulla@marvell.com
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- MA 02110-1301 USA
- */
+#ifndef _CONFIG_MV88F6281GTW_GE_H +#define _CONFIG_MV88F6281GTW_GE_H
+/*
- Version number information
- */
+#define CONFIG_IDENT_STRING "\nMarvell-MV88F6281GTW_GE-A0"
+/*
- High Level Configuration Options (easy to change)
- */
+#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_MV88F6281GTW_GE /* Machine type */
+#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_ARCH_LOWLEVEL_INIT /* enable arch_lowlevel_init */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
NACK If you so skip the lowlevel init you will skip *ALL* lowlevel_init arch include
+#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
Best Regards, J.