On Wed, Oct 26, 2016 at 3:39 PM, Jagan Teki wrote:
On Wed, Sep 28, 2016 at 4:39 PM, Yuan Yao yao.yuan@freescale.com wrote:
From: Yuan Yao yao.yuan@nxp.com
The QSPI support the direct 4bytes address command for flash read/write/erase. And the address can cover the whole QSPI memory space.
Signed-off-by: Yuan Yao yao.yuan@nxp.com
drivers/spi/fsl_qspi.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 2144fca..119b782 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -25,7 +25,8 @@ DECLARE_GLOBAL_DATA_PTR; #define TX_BUFFER_SIZE 0x40 #endif
-#define OFFSET_BITS_MASK GENMASK(23, 0) +#define OFFSET_BITS_MASK ((FSL_QSPI_FLASH_SIZE > SZ_16M) ? \
GENMASK(27, 0) : GENMASK(23,+0))
#define FLASH_STATUS_WEL 0x02
@@ -760,7 +761,10 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int
bitlen,
if (dout) { if (flags & SPI_XFER_BEGIN) { priv->cur_seqid = *(u8 *)dout;
memcpy(&txbuf, dout, 4);
if (FSL_QSPI_FLASH_SIZE > SZ_16M)memcpy(&txbuf, dout + 1, 4);elsememcpy(&txbuf, dout, 4);This driver has lot of flash hacks, and I am completely unhappy about this please try to write new driver on flash side (mtd/spi).
Hi Jagan,
Yes, I think so, I also think I need rewrite this driver now. In fact, I'm working on this. But need more time, So I have to send those patch set to support 16M+ support.
Thanks for your support.