On 11/08/2016 08:02, Peng Fan wrote:
The i.MX6ULL's GPT supportting taking OSC as clock source. Add i.MX6ULL support.
Signed-off-by: Peng Fan peng.fan@nxp.com Signed-off-by: Ye Li ye.li@nxp.com Cc: Stefano Babic sbabic@denx.de
arch/arm/imx-common/timer.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index a01590c..fb1b693 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -44,7 +44,8 @@ static inline int gpt_has_clk_source_osc(void) { #if defined(CONFIG_MX6) if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul())
is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() ||is_mx6ull())return 1;
return 0;
@@ -83,8 +84,8 @@ int timer_init(void) if (gpt_has_clk_source_osc()) { i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
/* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */if (is_mx6sdl() || is_mx6sx() || is_mx6ul()) {
/* For DL/S, SX, UL, ULL set 24Mhz OSC Enable bit and prescaler */if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull()) { i |= GPTCR_24MEN; /* Produce 3Mhz clock */
Reviewed-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic