On 05/25/2017 10:53 AM, Chee, Tien Fong wrote:
On Rab, 2017-05-24 at 09:56 -0500, Dinh Nguyen wrote:
On 05/23/2017 09:24 PM, tien.fong.chee@intel.com wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
This is the 6th version of patchset to adds support for Intel Arria 10 SoC FPGA driver. This version mainly resolved comments from Dinh in [v5]. This series is working on top of u-boot-socfpga-next branch http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=shortlog;h=refs/h eads/next.
tml
v5 -> v6 changes:
- Created separate patch for enabling FPGA driver support.
Please consider at least doing a compile test for this patch series? I'm now very skeptical that you've done any kind of testing on this patch series? :(
For 'make socfpga_cyclone5_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_bridges_reset': /home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/reset_manager_gen5.c:101: undefined reference to `fpgamgr_test_fpga_ready' arch/arm/mach-socfpga/built-in.o: In function `populate_sysmgr_fpgaintf_module': /home/dinguyen/linux_dev/u-boot/arch/arm/mach- socfpga/system_manager_gen5.c:48: undefined reference to `fpgamgr_test_fpga_ready' drivers/built-in.o: In function `sdram_mmr_init_full': /home/dinguyen/linux_dev/u-boot/drivers/ddr/altera/sdram.c:448: undefined reference to `fpgamgr_test_fpga_ready' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1 Makefile:1347: recipe for target 'spl/u-boot-spl' failed make: *** [spl/u-boot-spl] Error 2
For socfpga_arria10_defconfig:
arch/arm/mach-socfpga/built-in.o: In function `socfpga_fpga_add': /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:110: undefined reference to `fpga_init' /home/dinguyen/linux_dev/u-boot/arch/arm/mach-socfpga/misc.c:112: undefined reference to `fpga_add' scripts/Makefile.spl:334: recipe for target 'spl/u-boot-spl' failed make[1]: *** [spl/u-boot-spl] Error 1 Makefile:1347: recipe for target 'spl/u-boot-spl' failed make: *** [spl/u-boot-spl] Error 2
Dinh
I did the compilation on each patch, and testing the patch set on all arria10, cyclone5 and arria10 devkit.
I suspect something wrong with v6-0005-arm-socfpga-Move-FPGA-manager- driver-to-FPGA-driv.patch you applied. Could you help me check again and confirm all the patches waere applied properly?
In the meantime, i will clone the lastet from mainstream to confirm again. This cloning need take a few hours to finish.
Do you know git fetch origin ? That'll fetch only the new blobs, you don't need to fetch the whole repo again ...