Main domain ESM support is needed to configure main domain watchdogs to generate ESM pin events by default. On J7 processor board these propagate to the PMIC to generate a reset when watchdog expires.
Signed-off-by: Tero Kristo t-kristo@ti.com --- arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 9 +++++++++ arch/arm/dts/k3-j721e.dtsi | 1 + 2 files changed, 10 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 1f14d71438..c8dea666c8 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -75,6 +75,15 @@ }; };
+&cbass_main { + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + u-boot,dm-spl; + }; +}; + &dmsc { mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; mbox-names = "tx", "rx", "notify"; diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi index 68ba517e50..e470d3a1b5 100644 --- a/arch/arm/dts/k3-j721e.dtsi +++ b/arch/arm/dts/k3-j721e.dtsi @@ -135,6 +135,7 @@ #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */