In case the i.MX8M Plus starts from eMMC BOOT1/BOOT2 HW partitions, the flash.bin container is stored at offset 0 from the start, that means the fitImage itb is at offset 0x2c0 instead of 0x300 sectors from the start. Handle this difference in custom spl_mmc_get_uboot_raw_sector() .
Signed-off-by: Marek Vasut marex@denx.de --- Cc: Fabio Estevam festevam@gmail.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de --- board/data_modul/imx8mp_edm_sbc/spl.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c index c30185e48d4..2fdd95a730c 100644 --- a/board/data_modul/imx8mp_edm_sbc/spl.c +++ b/board/data_modul/imx8mp_edm_sbc/spl.c @@ -107,6 +107,20 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[4] = BOOT_DEVICE_NONE; }
+unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, unsigned long sect) +{ + const u32 boot_dev = spl_boot_device(); + int part; + + if (boot_dev == BOOT_DEVICE_MMC2) { /* eMMC */ + part = spl_mmc_emmc_boot_partition(mmc); + if (part == 1 || part == 2) /* eMMC BOOT1/BOOT2 HW partitions */ + return sect - 0x40; + } + + return sect; +} + static struct dram_timing_info *dram_timing_info[8] = { &dmo_imx8mp_sbc_dram_timing_32_32, /* 32 Gbit x32 */ NULL, /* 32 Gbit x16 */