this isnt against u-boot mainline, so there will be a few things that are out of date (like the CFG handling), so over look that part. what's up for comments here is the general architecture. ive omitted the env_spiflash.c portion as i think that'll be pretty cheesy.
basically ive laid it out like so: - common/cmd_spiflash.c: provides the user interface of the spiflash subsystem. depends on these functions being implemented elsewhere: * spiflash_info() - ask the spiflash driver for info * spiflash_read() - ask the spiflash driver to read * spiflash_write() - ask the spiflash driver to write * spiflash_erase() - ask the spiflash driver to erase no validation occurs in the common code since it has no idea about sector sizes and such. i could add a spiflash_query() function and have it return a struct describing the spiflash and use that to validate, but i dont think it's really worth the effort. relevant defines: * CFG_CMD_SPIFLASH - include the "spiflash" command * CFG_SPIFLASH_MULTI - support multiple parts (via "cs" parameter)
- drivers/mtd/spiflash_jedec.c: provides the spiflash driver functions needed by the common layer. detects and works with Spansion/ST/Atmel/Winbond parts. i've personally verified at least one part from each family, but obviously not every part ;). it depends on these functions being implemented elsewhere: * spiflash_on() - turn on the SPI * spiflash_off() - turn off the SPI * spiflash_cs_set() - assert/deassert the specified chip select * spiflash_exchange_byte() - send specified byte and return received byte relevant defines: * CFG_SPIFLASH_JEDEC_DRIVER - enable this driver * CFG_SPIFLASH_MULTI - disable a small runtime opt to avoid redetection
- board/$BOARD/spiflash.c: provides the board / cpu specific spiflash functions. ive included the Blackfin one here as an example.
-mike