Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

On 3/22/12, Troy Kisky troy.kisky@boundarydevices.com wrote:

Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.

Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com

Confirmed with the design team that your patch is correct.

Thanks for catching this.

Acked-by: Fabio Estevam fabio.estevam@freescale.com