Hello.
On 16-08-2011 14:31, Lukasz Majewski wrote:
This commit adds support for reading the D cache line size for armv7 architecture.
The get_dcache_line_size() function is supposed to work in conjunction with memalign call to provide D cache aligned DMA buffers.
Signed-off-by: Lukasz Majewskil.majewski@samsung.com Signed-off-by: Kyungmin Parkkyungmin.park@samsung.com CC: Aneesh Vaneesh@ti.com CC: Albert ARIBAUDalbert.u.boot@aribaud.net
Changes for v2:
- Weak function get_dcache_line_size added to lib/cache.c for non armv7
architectures
arch/arm/cpu/armv7/cache_v7.c | 15 +++++++++++++++ arch/arm/lib/cache.c | 11 +++++++++++ include/common.h | 1 + 3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 3e1e1bf..0ff9a97 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -246,6 +246,21 @@ static void v7_inval_tlb(void) CP15ISB; }
+/* Read the cache line size (in bytes) */ +int get_dcache_line_size(void) +{
- u32 ccsidr, log2_line_len;
An empty line wounldn't hurt here.
- puts("222\n");
Shouldn't that have been deleted?
WBR, Sergei