We don't support SDRAM init in 64-bit mode since it is essentially impossible to get into that mode before SDRAM set up. Provide dummy functions for now. At some point we will need to pass the SDRAM parameters through from SPL.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v3: - Put dummy misc_init_r() and print_cpuinfo() functions into cpu.c - Drop duplicate comment line in header
Changes in v2: None
arch/x86/cpu/ivybridge/Makefile | 3 +++ arch/x86/cpu/ivybridge/sdram_nop.c | 18 ++++++++++++++++++ arch/x86/cpu/x86_64/cpu.c | 10 ++++++++++ 3 files changed, 31 insertions(+) create mode 100644 arch/x86/cpu/ivybridge/sdram_nop.c
diff --git a/arch/x86/cpu/ivybridge/Makefile b/arch/x86/cpu/ivybridge/Makefile index 1a526c8f0f5..25fbd599db0 100644 --- a/arch/x86/cpu/ivybridge/Makefile +++ b/arch/x86/cpu/ivybridge/Makefile @@ -16,5 +16,8 @@ ifndef CONFIG_SPL_BUILD obj-y += sata.o endif obj-$(CONFIG_$(SPL_)X86_32BIT_INIT) += sdram.o +ifndef CONFIG_$(SPL_)X86_32BIT_INIT +obj-y += sdram_nop.o +endif endif obj-y += bd82x6x.o diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c new file mode 100644 index 00000000000..bd1189e4471 --- /dev/null +++ b/arch/x86/cpu/ivybridge/sdram_nop.c @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2016 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = 1ULL << 31; + gd->bd->bi_dram[0].start = 0; + gd->bd->bi_dram[0].size = gd->ram_size; + + return 0; +} diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 36272296e63..77cbb567c45 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -59,3 +59,13 @@ int x86_mp_init(void) /* Not implemented */ return 0; } + +int misc_init_r(void) +{ + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +}