Hi Tom,
I just came from vacation and didn't catch rc1 merge window. Here are patches I have collected in connection to Xilinx and FPGA.
Thanks, Michal
The following changes since commit d0d07ba86afc8074d79e436b1ba4478fa0f0c1b5:
Prepare v2019.10-rc1 (2019-07-29 21:16:16 -0400)
are available in the Git repository at:
git@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2019.10
for you to fetch changes up to cd228cc04afc79c1383be707d0b812f45dfd53aa:
arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabled (2019-07-30 17:09:58 +0200)
---------------------------------------------------------------- Xilinx/FPGA changes for v2019.10
fpga: - Xilinx virtex2 cleanup - Altera cyclon2 cleanup
zynq: - Minor Kconfig cleanup - Add psu_init configuration for Z-turn board
zynqmp: - Add support for pmufw config passing to PMU - script for psu_init conversion - zcu1275 renaming
xilinx: - Add support for UltraZed-EV SoM
---------------------------------------------------------------- Alexander Dahl (5): fpga: altera: Add some more device sizes fpga: altera: cyclon2: Fix most checkpatch warnings fpga: altera: cyclon2: Fix indentation fpga: altera: cyclon2: Check function pointer before calling cmd: fpga: Change return value to avoid printing usage text
Anton Gerasimov (1): ARM: zynq: Add configuration for Z-turn board
Luca Ceresoli (7): arm64: zynqmp: spl: install a PMU firmware config object at runtime arm64: zynqmp: add tool to convert PMU config object .c to binary arm64: zynqmp: xil_io.h: declare functions as static arm64: zynqmp: add tool to minimize psu_init_gpl.c files tools: zynqmp_psu_init_minimize.sh: fix return lines coding style arm64: zynqmp: add support for Avnet UltraZed-EV Starter Kit arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EV
Michal Simek (2): arm64: zynqmp: Rename zc1275 to zcu1275 arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabled
Robert Hancock (5): fpga: virtex2: cosmetic: Cleanup code style fpga: virtex2: added Kconfig option fpga: virtex2: Split out image writing from pre/post operations fpga: virtex2: Add additional clock cycles after DONE assertion fpga: virtex2: Add slave serial programming support
Robert P. J. Day (2): ARM: zynq: delete long-dead CONFIG_USB_CABLE_CHECK cmd: fpga: correct typo, capitalize "Xilinx"
arch/arm/dts/Makefile | 5 +- arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts | 59 +++++++++++ arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi | 56 ++++++++++ arch/arm/dts/{zynqmp-zc1275-revA.dts => zynqmp-zcu1275-revA.dts} | 7 +- arch/arm/dts/{zynqmp-zc1275-revB.dts => zynqmp-zcu1275-revB.dts} | 7 +- arch/arm/mach-zynqmp/Kconfig | 18 ++++ arch/arm/mach-zynqmp/Makefile | 4 + arch/arm/mach-zynqmp/include/mach/sys_proto.h | 2 + arch/arm/mach-zynqmp/pmu_ipc.c | 112 ++++++++++++++++++++ board/xilinx/zynq/zynq-zturn/ps7_init_gpl.c | 281 ++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/MAINTAINERS | 6 ++ board/xilinx/zynqmp/Makefile | 7 ++ board/xilinx/zynqmp/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0/psu_init_gpl.c | 663 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/pm_cfg_obj.S | 17 +++ board/xilinx/zynqmp/pm_cfg_obj.h | 9 ++ board/xilinx/zynqmp/xil_io.h | 6 +- board/xilinx/zynqmp/zynqmp.c | 9 ++ cmd/fpga.c | 2 +- configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 64 ++++++++++++ configs/{xilinx_zynqmp_zc1275_revA_defconfig => xilinx_zynqmp_zcu1275_revA_defconfig} | 2 +- configs/{xilinx_zynqmp_zc1275_revB_defconfig => xilinx_zynqmp_zcu1275_revB_defconfig} | 2 +- drivers/fpga/Kconfig | 8 ++ drivers/fpga/cyclon2.c | 101 +++++++++--------- drivers/fpga/virtex2.c | 503 +++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------ include/ACEX1K.h | 10 ++ include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - include/fpga.h | 2 +- include/virtex2.h | 13 +-- scripts/config_whitelist.txt | 1 - tools/zynqmp_pm_cfg_obj_convert.py | 301 +++++++++++++++++++++++++++++++++++++++++++++++++++++ tools/zynqmp_psu_init_minimize.sh | 148 ++++++++++++++++++++++++++ 32 files changed, 2148 insertions(+), 279 deletions(-) create mode 100644 arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts create mode 100644 arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi rename arch/arm/dts/{zynqmp-zc1275-revA.dts => zynqmp-zcu1275-revA.dts} (89%) rename arch/arm/dts/{zynqmp-zc1275-revB.dts => zynqmp-zcu1275-revB.dts} (89%) create mode 100644 arch/arm/mach-zynqmp/pmu_ipc.c create mode 100644 board/xilinx/zynq/zynq-zturn/ps7_init_gpl.c create mode 100644 board/xilinx/zynqmp/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp/pm_cfg_obj.S create mode 100644 board/xilinx/zynqmp/pm_cfg_obj.h create mode 100644 configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig rename configs/{xilinx_zynqmp_zc1275_revA_defconfig => xilinx_zynqmp_zcu1275_revA_defconfig} (96%) rename configs/{xilinx_zynqmp_zc1275_revB_defconfig => xilinx_zynqmp_zcu1275_revB_defconfig} (96%) create mode 100755 tools/zynqmp_pm_cfg_obj_convert.py create mode 100755 tools/zynqmp_psu_init_minimize.sh