Hi Fabio,
On Tuesday, February 26, 2013 3:21:25 PM, Fabio Estevam wrote:
Hi Benoît,
On Tue, Feb 26, 2013 at 10:35 AM, Fabio Estevam festevam@gmail.com wrote:
Yes, after using the same IOMUX from FSL U-boot I get:
NAND: NAND device: Manufacturer ID: 0xec, Chip ID: 0xd5 (Samsung NAND 2GiB 3,3) NAND bus width 16 instead 8 bit No NAND device found!!! 0 MiB
This should be fixed separetely and it is not related to your patch. I will submit a patch for this 16-bit detection issue
OK. Please update all boards using mxc_nand.
I was able to read and write to NAND, I have also tested to save env vars into NAND and it works fine.
Great! Thanks for testing.
So, after changing the IOMUX as per FSL U-boot
If I look at FSL's setup_nfc() vs. my setup_iomux_nand(): - The IOMUX setup is the same, with CS1 and DA0-7 left in their reset ALT0 mode. - The pad setups differ from the reset values in FSL's code, so I think that this is all that needs to be changed (i.e. adding the mxc_iomux_set_pad()). Can you confirm? - Are 'M4IF_GPR.MM = 0' and 'EIM_CSxGCR2[12] = 0' also required, or is this handled properly by your board through BOOT_CFG1[6]? I think that we should enforce this too by software for the same reason as for bus width.
you can add my: Tested-by: Fabio Estevam fabio.estevam@freescale.com
Will do, thanks again. So for 01-03, and 15 (with 0x32000). Do you agree?
Best regards, Benoît