On Friday, October 09, 2015 at 04:49:03 AM, Ley Foon Tan wrote:
On Fri, Oct 9, 2015 at 5:39 AM, Marek Vasut marex@denx.de wrote:
+DECLARE_GLOBAL_DATA_PTR;
+static void __flush_dcache_all(unsigned long start, unsigned long end) +{
unsigned long addr;start &= ~(gd->arch.dcache_line_size - 1);I'd suggest to use GENMASK() here, but I don't think we picked this from Linux just yet.
end += (gd->arch.dcache_line_size - 1);end &= ~(gd->arch.dcache_line_size - 1);Is this an attempt at poor-mans' rounding ? I think you want to implment something like arch/arm/cpu/arm926ejs/cache.c check_cache_range() and NOT do any rounding here. The reason for that is that if you do rounding, you might accidentally corrupt a piece of memory which was just delivered via DMA before you did the flush.
The code above is to convert the address to dcache line size.
So it's aligning the unaligned accesses, correct?
arch/arm/cpu/arm926ejs/cache.c check_cache_range() will skip the cache flushing if it is unaligned to cache line size.
That's right, unaligned cache flushes/invalidations should not happen, ever.
I'm not sure how frequent U-boot access to non-aligned cache line size.
They must not ever happen, if some driver does them, the driver needs to be fixed.
Best regards, Marek Vasut