On 09/26/2014 02:29 AM, Marek Vasut wrote:
On Tuesday, September 23, 2014 at 11:59:28 PM, Dinh Nguyen wrote:
btw. please try to trim down the content of the patch when replying only to the relevant part, so others don't have to look up the relevant bits among billions of lines of irrelevant stuff.
Will do more snipping...
[...]
+#define DWC2_GUSBCFG_TX_END_DELAY (1 << 28) +#define DWC2_GUSBCFG_TX_END_DELAY_OFFSET 28
bits 29 and 30 of GUSBCFG are to Force Host and Device mode, respectively. These bits may get used in the future.
That's good, what's their exact name please ?
They should be: #define DWC2_GUSBCFG_FORCEDEVMODE (1 << 30) #define DWC2_GUSBCFG_FORCEHOSTMODE (1 << 29)
Also, for patch 1/3 and 2/3, I was able to test USB functionality on the SoCFPGA devkit. So you can add:
Tested-by: Dinh Nguyen dinguyen@opensource.altera.com
Thanks, Dinh