Hi Fabio,
On 20/06/2014 20:58, Fabio Estevam wrote:
Hi Stefano,
On Tue, Jun 17, 2014 at 3:59 PM, Eric Nelson eric.nelson@boundarydevices.com wrote:
Previously, we had IOMUX_PAD, I know. Is there any special reason we cannot use MX6_PAD_DECL even for this new SOC ? I will not want to go back ignoring a lot of work that was done to merge the SOCs together.
The rationale for the MX6_PAD_DECL came from the fact that the i.MX6DQ and i.MX6DLS cpu variants had different address schemes, but were pin-compatible.
The i.MX6SL (and i.MX6SX) are not, so any board supporting these processors only supports that processor.
As per Eric's explanation I plan to keep this patch unchanged for v2, if that's ok with you.
That is ok - I am sometimes more optimistic about how to simplify code as it is really physeable. Thanks both of you to have clarified the point.
Regards, Stefano