This caused CAM_MCLK's pinmux reg to be locked out, since the table parsing code couldn't find a matching entry for VI_ALT3 and wrote garbage to the register.
Signed-off-by: Tom Warren twarren@nvidia.com --- arch/arm/cpu/tegra114-common/pinmux.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/cpu/tegra114-common/pinmux.c index f037320..4f3c352 100644 --- a/arch/arm/cpu/tegra114-common/pinmux.c +++ b/arch/arm/cpu/tegra114-common/pinmux.c @@ -239,7 +239,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = { PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4), PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4), PIN_RESERVED, /* Reserved by t114: 0x3280 */ - PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT2, RSVD4), + PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4), PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4), PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3), PINI(CAM_I2C_SCL, CAM, VGP1, I2C3, RSVD3, RSVD4),