On Thu, Apr 30, 2020 at 3:25 AM Mizan R exqdzn@gmail.com wrote:
Banana Pi P2 Zero is almost identic with Banana Pi M2 Zero withadditional eMMC and PoE functionality This patch allows uboot to detect ethernet, usb, and eMMC during boot
Bootlog:
U-Boot SPL 2020.04 (Apr 30 2020 - 03:41:48 +0700) DRAM: 512 MiB Trying to boot from MMC1
U-Boot 2020.04 (Apr 30 2020 - 03:41:48 +0700) Allwinner Technology
CPU: Allwinner H3 (SUN8I 1680) Model: Banana Pi BPI-P2-Zero DRAM: 512 MiB MMC: Device 'mmc@1c11000': seq 1 is in use by 'mmc@1c10000' mmc@1c0f000: 0, mmc@1c10000: 2, mmc@1c11000: 1 Loading Environment from FAT... Unable to use mmc 1:1... In: serial Out: serial Err: serial Net: phy interface0 eth0: ethernet@1c30000 starting USB... Bus usb@1c1a000: USB EHCI 1.00 scanning bus usb@1c1a000 for devices... U-Boot SPL 2020.04 (Apr 30 2020 - 03:41:48 +0700) DRAM: 512 MiB Trying to boot from MMC1
U-Boot 2020.04 (Apr 30 2020 - 03:41:48 +0700) Allwinner Technology
CPU: Allwinner H3 (SUN8I 1680) Model: Banana Pi BPI-P2-Zero DRAM: 512 MiB MMC: Device 'mmc@1c11000': seq 1 is in use by 'mmc@1c10000' mmc@1c0f000: 0, mmc@1c10000: 2, mmc@1c11000: 1 Loading Environment from FAT... Unable to use mmc 1:1... In: serial Out: serial Err: serial Net: phy interface0 eth0: ethernet@1c30000 starting USB... Bus usb@1c1a000: USB EHCI 1.00 scanning bus usb@1c1a000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot.scr 515 bytes read in 2 ms (251 KiB/s) ## Executing script at 43100000 21901 bytes read in 3 ms (7 MiB/s) 3966976 bytes read in 182 ms (20.8 MiB/s) ## Flattened Device Tree blob at 41000000 Booting using the fdt blob at 0x41000000 EHCI failed to shut down host controller. Loading Device Tree to 49ff7000, end 49fff58c ... OK
Starting kernel ...
Drop this boot log, please.
Signed-off-by: Mizan R exqdzn@gmail.com
SHA1SUM for sun8i-h2-plus-bananapi-p2-zero.dts: c682e1d9faba9d8c959ac526eef0962fc9ebd628 arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts
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arch/arm/dts/Makefile | 1 + .../dts/sun8i-h2-plus-bananapi-p2-zero.dts | 181 ++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/bananapi_p2_zero_defconfig | 20 ++ 4 files changed, 207 insertions(+) create mode 100644 arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts create mode 100644 configs/bananapi_p2_zero_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 820ee973..443d36f9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -516,6 +516,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-tbs-a711.dtb dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-bananapi-p2-zero.dtb \ sun8i-h2-plus-libretech-all-h3-cc.dtb \ sun8i-h2-plus-orangepi-r1.dtb \ sun8i-h2-plus-orangepi-zero.dtb \diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts new file mode 100644 index 00000000..b253e6e4 --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (C) 2020 Mizan R exqdzn@gmail.com
- Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is:
- Copyright (C) 2017 Icenowy Zheng icenowy@aosc.io
- */
+/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h>
+/ {
model = "Banana Pi BPI-P2-Zero";compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus";aliases {serial0 = &uart0;serial1 = &uart1;ethernet0 = &emac;};chosen {stdout-path = "serial0:115200n8";};connector {compatible = "hdmi-connector";type = "a";port {hdmi_con_in: endpoint {remote-endpoint = <&hdmi_out_con>;};};};leds {compatible = "gpio-leds";pinctrl-names = "default";pwr_led {label = "bananapi-p2-zero:red:pwr";linux,default-trigger = "heartbeat";gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */default-state = "on";};};gpio_keys {compatible = "gpio-keys";pinctrl-names = "default";sw4 {label = "power";linux,code = <BTN_0>;gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;};};reg_vdd_cpux: vdd-cpux-regulator {compatible = "regulator-gpio";regulator-name = "vdd-cpux";regulator-type = "voltage";regulator-boot-on;regulator-always-on;regulator-min-microvolt = <1100000>;regulator-max-microvolt = <1300000>;regulator-ramp-delay = <50>; /* 4ms */gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */enable-active-high;gpios-states = <0x1>;states = <1100000 0x01300000 0x1>;};wifi_pwrseq: wifi_pwrseq {compatible = "mmc-pwrseq-simple";pinctrl-names = "default";reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */};+};
+&cpu0 {
cpu-supply = <®_vdd_cpux>;+};
+&de {
status = "okay";+};
+&ehci0 {
status = "okay";+};
+&emac {
phy-handle = <&int_mii_phy>;phy-mode = "mii";allwinner,leds-active-low;status = "okay";+};
+&hdmi {
status = "disabled";+};
+&hdmi_out {
hdmi_out_con: endpoint {remote-endpoint = <&hdmi_con_in>;};+};
+&mmc0 {
vmmc-supply = <®_vcc3v3>;bus-width = <4>;cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */status = "okay";+};
+&mmc1 {
vmmc-supply = <®_vcc3v3>;vqmmc-supply = <®_vcc3v3>;mmc-pwrseq = <&wifi_pwrseq>;bus-width = <4>;non-removable;status = "okay";brcmf: wifi@1 {reg = <1>;compatible = "brcm,bcm4329-fmac";interrupt-parent = <&pio>;interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */interrupt-names = "host-wake";};+};
+&mmc2 {
pinctrl-names = "default";pinctrl-0 = <&mmc2_8bit_pins>;vmmc-supply = <®_vcc3v3>;vqmmc-supply = <®_vcc3v3>;bus-width = <8>;non-removable;status = "okay";+};
+&ohci0 {
status = "okay";+};
+&uart0 {
pinctrl-names = "default";pinctrl-0 = <&uart0_pa_pins>;status = "okay";+};
+&uart1 {
pinctrl-names = "default";pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;status = "okay";+};
+&usb_otg {
dr_mode = "otg";status = "okay";+};
+&usbphy {
usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 *//** There're two micro-USB connectors, one is power-only and another is* OTG. The Vbus of these two connectors are connected together, so* the external USB device will be powered just by the power input* from the power-only USB port.*/status = "okay";+}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 1180b86d..e33a5de1 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -166,6 +166,11 @@ M: Icenowy Zheng icenowy@aosc.io S: Maintained F: configs/bananapi_m2_zero_defconfig
+BANANAPI P2 ZERO BOARD +M: Mizan R exqdzn@gmail.com +S: Maintained +F: configs/bananapi_p2_zero_defconfig
BANANAPI M64 M: Jagan Teki jagan@amarulasolutions.com S: Maintained diff --git a/configs/bananapi_p2_zero_defconfig b/configs/bananapi_p2_zero_defconfig new file mode 100644 index 00000000..aa9a139e --- /dev/null +++ b/configs/bananapi_p2_zero_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_MMC0_CD_PIN="" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CONSOLE_MUX=y +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-p2-zero" +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
NAK, seems like you didn't resolve the v1 comments. please take care of next version.
Jagan.