PD_TIM bit field which specifies the power down timing is defined to occupy bits 8-11, where as it is actually from 12-15 bits. So correcting this.
Signed-off-by: R Sricharan r.sricharan@ti.com --- arch/arm/include/asm/emif.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index aab15d8..f1e3ad2 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -226,8 +226,8 @@ #define EMIF_REG_CS_TIM_MASK (0xf << 0)
/* PWR_MGMT_CTRL_SHDW */ -#define EMIF_REG_PD_TIM_SHDW_SHIFT 8 -#define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 8) +#define EMIF_REG_PD_TIM_SHDW_SHIFT 12 +#define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 12) #define EMIF_REG_SR_TIM_SHDW_SHIFT 4 #define EMIF_REG_SR_TIM_SHDW_MASK (0xf << 4) #define EMIF_REG_CS_TIM_SHDW_SHIFT 0