On 12/07/2017 08:25 AM, Peng Fan wrote:
Hi Alexander, On Fri, Dec 01, 2017 at 10:46:29PM +0100, Alexander Graf wrote:
On 28.11.17 03:09, Peng Fan wrote:
When compiling with android toolchain, there is an instruction "str q0, [x8],#16", but x8 is not 16bytes aligned, this instruction will trigger sync abort.
So, following Linux kernel, only use general regs for arm64. If not, compiler may use simd registers Q[x]. We need to avoid using simd registers in U-Boot, because load/store Q[x] has restriction that 128bits aligned when str/ldr.
Signed-off-by: Peng Fan peng.fan@nxp.com
The compiler should only output 16-byte-alignemnt-requiring instructions when it can safely assume that the variable in question is 16 byte aligned.
Where did x8 come from? That was probably just an unsafe cast?
I am not able to resetup my compiler enviorment, it's long time since we found this issue.
Just objdump and seems it is memset/memcpy,
00000000007ee708 <memset>: 7ee708: 92400804 and x4, x0, #0x7 7ee70c: aa0003e3 mov x3, x0
.......
7ee764: aa0003e8 mov x8, x0 7ee768: d2800007 mov x7, #0x0 // #0 7ee76c: 3c810500 str q0, [x8], #16
I would assume this 16-byte aligned store only happens when the pointer is also 16-byte aligned.
Really, I am fairly sure if you ran into issues, we're looking at a compiler bug or an unsafe cast. We shouldn't disable vector register usage in U-Boot altogether because of either.
Alex