Both boards were missing the CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR defines.
Signed-off-by: Ithamar R. Adema ithamar.adema@team-embedded.nl --- include/configs/SMN42.h | 3 +++ include/configs/lpc2292sodimm.h | 3 +++ 2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index 4a8acab..d46b6c5 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -163,6 +163,9 @@ #define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) + /* This is the external flash */ #define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */ #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index 17972d7..05a9480 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -130,6 +130,9 @@ #define PHYS_SDRAM_1 0x81000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB SDRAM */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) + #define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */ #define PHYS_FLASH_SIZE 0x00200000 /* 2 MB */