Add nds32 support in generic u-boot and board include header files.
Signed-off-by: Macpaul Lin macpaul@andestech.com --- include/common.h | 10 ++ include/configs/adp-ag101.h | 33 ++++++ include/configs/ag101.h | 265 +++++++++++++++++++++++++++++++++++++++++++ include/image.h | 5 + include/nds32_common.h | 214 ++++++++++++++++++++++++++++++++++ include/nds32_n10.h | 30 +++++ include/nds32_n12.h | 30 +++++ include/nds32_n9.h | 30 +++++ 8 files changed, 617 insertions(+), 0 deletions(-) create mode 100644 include/configs/adp-ag101.h create mode 100644 include/configs/ag101.h create mode 100644 include/nds32_common.h create mode 100644 include/nds32_n10.h create mode 100644 include/nds32_n12.h create mode 100644 include/nds32_n9.h
diff --git a/include/common.h b/include/common.h index 8bca04f..629ebd5 100644 --- a/include/common.h +++ b/include/common.h @@ -43,6 +43,9 @@ typedef volatile unsigned char vu_char; #if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000)) #include <pci.h> #endif +#if defined(CONFIG_NDS32) +#include <nds32_common.h> /* should be reference to <asm/somefile.h> */ +#endif #if defined(CONFIG_8xx) #include <asm/8xx_immap.h> #if defined(CONFIG_MPC852) || defined(CONFIG_MPC852T) || \ @@ -274,6 +277,9 @@ void forceenv (char *, char *); #ifdef CONFIG_I386 /* x86 version to be fixed! */ # include <asm/u-boot-i386.h> #endif /* CONFIG_I386 */ +#ifdef CONFIG_NDS32 +# include <asm/andesboot.h> +#endif /* CONFIG_NDS32 */
#ifdef CONFIG_AUTO_COMPLETE int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf); @@ -729,10 +735,14 @@ int cpu_release(int nr, int argc, char *argv[]); #define CONFIG_HAS_POST #endif
+/* CONFIG_INIT_CRITICAL is necessay to run cpu_init_crit in start.s, + or exception would rise*/ +#ifndef __nds32__ #ifdef CONFIG_INIT_CRITICAL #error CONFIG_INIT_CRITICAL is deprecated! #error Read section CONFIG_SKIP_LOWLEVEL_INIT in README. #endif +#endif
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h new file mode 100644 index 0000000..bc2211a --- /dev/null +++ b/include/configs/adp-ag101.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2006 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com + * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _CONFIG_ADP_AG101_H +#define _CONFIG_ADP_AG101_H + +#define CONFIG_N1213S 1 /* which is in an n1213s core cou */ +#define CONFIG_AG101 1 /* which is in an ag101 based board */ + +#include "ag101.h" + +#endif /* _CONFIG_ADP_AG101_H */ diff --git a/include/configs/ag101.h b/include/configs/ag101.h new file mode 100644 index 0000000..f1c1f92 --- /dev/null +++ b/include/configs/ag101.h @@ -0,0 +1,265 @@ +/* + * Copyright (C) 2006 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com + * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _CONFIG_AG101_H +#define _CONFIG_AG101_H + +//#include <nds32-fpga/cpe.h> +/* Andes NDS CPU core */ +#define CONFIG_NDS32 1 + +/* + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +/* undef for developing */ +#define CONFIG_INIT_CRITICAL + +/* + * High Level Configuration Options + * (easy to change) + */ +/* only nds32 */ +#define CONFIG_USE_INTERRUPT + +/* + * Skip Low Level Init + */ +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* + * Size of malloc() pool + */ +#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024) + +/* + * Hardware drivers + */ +#define CONFIG_DRIVER_FTMAC100 1 /* we have a FTMAC100 on-board */ +//#define CONFIG_DRIVER_FTPCI100 1 /* we have a FTPCI100 on-board */ +#define CONFIG_DRIVER_FTPCI100 0 /* we have a FTPCI100 on-board */ +//#define CONFIG_DRIVER_FOTG2xx 1 /* we have a FOTG2xx on-board */ +#ifdef not_complete_yet +#define FMAC_BASE 0x07000300 /* agrees with WIN CE PA */ +#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ +#endif /* end_of_not */ + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 /* use COM1 as terminal */ +//#define CONFIG_SERIAL2 1 /* use COM2 as terminal */ +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 38400 + +// Define the supported commands in andesboot, ex: go, run, bootm,... +#include <config_cmd_default.h> + +//#define CONFIG_CMD_PCI +//#define CONFIG_CMD_USB + +// AHB-PCI Bridge (FPCI100) + PCI-USB Bridge (NEC uPD720101) +#if defined(CONFIG_CMD_USB) && defined(CONFIG_CMD_PCI) + #define CONFIG_USB_OHCI_NEW 1 + #define CONFIG_PCI + //#define CONFIG_PCI_SCAN_SHOW 1 + #define CONFIG_PCI_OHCI 1 + //#define CONFIG_PCI_OHCI_DEVNO 1 //index, not number + //#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1 + #define LITTLEENDIAN 1 + //#define CONFIG_SYS_OHCI_BE_CONTROLLER 1 + #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 + #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci" +#elif defined(CONFIG_CMD_USB) + #undef CONFIG_USB_OHCI_NEW + #undef CONFIG_PCI_OHCI + #define CONFIG_USB_OHCI // u-boot.2009.01 has no CONFIG_USB_EHCI + //#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000 + //#define CONFIG_SYS_USB_EHCI_CPU_INIT +#endif + +#ifdef CONFIG_CMD_USB + #define CONFIG_USB_STORAGE 1 + #define CONFIG_DOS_PARTITION 1 + #define CONFIG_CMD_FAT 1 +#endif + + +#define CONFIG_BOOTDELAY 3 +//#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" +//#define CONFIG_ETHADDR 00:41:71:99:00:00 +#define CONFIG_NETMASK 255.255.255.0 +//#define CONFIG_IPADDR 10.0.4.45 +//#define CONFIG_SERVERIP 10.0.4.173 +//#define CONFIG_BOOTFILE "elinos-lart" +//#define CONFIG_BOOTCOMMAND "tftp; bootm" + +// TBD +// Can't fine CONFIG_CMD_KGDB, delete by nobuhiro +#if 0 +#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) +//#if (CONFIG_COMMANDS) + #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ + /* what's this ? it's not used anywhere */ + #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif +#else +#undef CONFIG_CMD_KGDB // update for u-boot.2009.01 +#endif +/* + * Miscellaneous configurable options + */ +#define CONFIG_PROMPT "NDS32>" /* Monitor Command Prompt: console.c */ +#define CONFIG_CBSIZE 256 /* Console I/O Buffer Size: console.c */ + +#define CONFIG_SYS_PROMPT "NDS32>" /* Monitor Command Prompt: main.c */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size: main.c */ + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PBSIZE (CONFIG_CBSIZE+sizeof(CONFIG_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00200000 + +//#undef CONFIG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */ + +/* Partitions */ +//#define CONFIG_MAC_PARTITION +//#define CONFIG_DOS_PARTITION +//#define CONFIG_ISO_PARTITION + +/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ +/* it to wrap 100 times (total 1562500) to get 1 sec. */ +//#define CONFIG_HZ 1562500 + +#define CONFIG_SYS_HZ APB_CLK // timer clock frequency + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#ifndef __ASSEMBLY__ +/*----------------------------------------------------------------------- + * Board specific extension for bd_info + * + * This structure is embedded in the global bd_info (bd_t) structure + * and can be used by the board specific code (eg board/...) + */ + +struct bd_info_ext +{ + /* helper variable for board environment handling + * + * env_crc_valid == 0 => uninitialised + * env_crc_valid > 0 => environment crc in flash is valid + * env_crc_valid < 0 => environment crc in flash is invalid + */ + int env_crc_valid; +}; +#endif + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ + +#ifdef CONFIG_USE_INTERRUPT +#endif + +/* Start origin andes.h section */ +/*----------------------------------------------------------------------- + * Define version number (from andes.h) + */ +#define VERSION_MAJOR_NUM 0 +#define VERSION_MINOR_NUM 16 +#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ + +/*----------------------------------------------------------------------- + * Define platform (from andes.h) (current no use) + */ +#define CONFIG_ADP_AG101_120_PLATFORM +//#define CONFIG_ADP_AG101_110_PLATFORM + +/*----------------------------------------------------------------------- + * System Clock (from andes.h) + */ +//#define CONFIG_SYS_CLK_FREQ 16000000 //16.000000 MHz +//#define CONFIG_SYS_CLK_FREQ 18432000 //18.432000 MHz +//#define CONFIG_SYS_CLK_FREQ 22118400 //22.118400 MHz +#define CONFIG_SYS_CLK_FREQ 83000000 //83.000000 MHz +//#define CONFIG_SYS_CLK_FREQ 33000000 //83.000000 MHz +//#define CONFIG_SYS_CLK_FREQ 36864000 //36.864000 MHz + +/*----------------------------------------------------------------------- + * define flash bank (from andes.h) + */ +#define CONFIG_FLASH_BANK 1 //bank 0,1,2,3,4,5,6,7 +/* End origin andes.h section */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ + +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #0 */ +#define PHYS_SDRAM_0_SIZE 0x08000000 /* 128 MB */ + +#define PHYS_FLASH_1 0x80400000 /* Flash Bank #1 */ +//#define PHYS_FLASH_1 0x81400000 /* modify by Charles Tsai */ +#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ + +#define CONFIG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +/* + * [Hill_20090319], + * the leopard platform has 2 Intel J3-128 Flashes, + * each has 128Mb (16MB), configured to x16 mode, + * and concatenated to be a 32MB/32-bit device at one SMC bank. + * in the x16 mode, each NOR Flash has 128 sectors, each sector has 64x2 KB. + */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 128//(512) /* max number of sectors on one chip */ +#define CONFIG_FLASH_SECT_SIZE (0x10000*2*2) /* max number of sectors on one chip */ + + +/* timeout values are in ticks */ +#define CONFIG_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ + +#define CONFIG_ENV_IS_IN_FLASH 1 // added & modified by Hill 20090313 +#define CONFIG_ENV_ADDR (CONFIG_FLASH_BASE + 0x1C0000) /* Addr of Environment Sector */ +//#define CONFIG_ENV_ADDR (PHYS_SDRAM_0 + 0x1C0000) /* Addr of Environment Sector */ + +//#define CONFIG_ENV_SIZE 0x20000 /* Total Size of the Environment Sector */ +#define CONFIG_ENV_SIZE CONFIG_FLASH_SECT_SIZE /* Total Size of the Environment Sector */ +#endif /* _CONFIG_AG101_H */ diff --git a/include/image.h b/include/image.h index 294eba5..ac81dec 100644 --- a/include/image.h +++ b/include/image.h @@ -105,6 +105,7 @@ #define IH_ARCH_BLACKFIN 16 /* Blackfin */ #define IH_ARCH_AVR32 17 /* AVR32 */ #define IH_ARCH_ST200 18 /* STMicroelectronics ST200 */ +#define IH_ARCH_NDS32 19 /* ANDES Technology - nds32 */
/* * Image Types @@ -500,6 +501,8 @@ static inline int image_check_target_arch (const image_header_t *hdr) if (!image_check_arch (hdr, IH_ARCH_SH)) #elif defined(__sparc__) if (!image_check_arch (hdr, IH_ARCH_SPARC)) +#elif defined(__nds32__) + if (!image_check_arch (hdr, IH_ARCH_NDS32)) #else # error Unknown CPU type #endif @@ -652,6 +655,8 @@ static inline int fit_image_check_target_arch (const void *fdt, int node) if (!fit_image_check_arch (fdt, node, IH_ARCH_SH)) #elif defined(__sparc__) if (!fit_image_check_arch (fdt, node, IH_ARCH_SPARC)) +#elif defined(__nds32__) + if (!fit_image_check_arch (fdt, node, IH_ARCH_NDS32)) #else # error Unknown CPU type #endif diff --git a/include/nds32_common.h b/include/nds32_common.h new file mode 100644 index 0000000..d53c977 --- /dev/null +++ b/include/nds32_common.h @@ -0,0 +1,214 @@ +/* + * Copyright (C) 2006 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com + * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __NDS32_COMMON_H +#define __NDS32_COMMON_H + +/* DO NOT EDIT!! - this file automatically generated + * from .s file by awk -f s2h.awk + */ +/**************************************************************************** + * Copyright Faraday Technology Corp 2002-2003. All rights reserved. * + *--------------------------------------------------------------------------* + * Name:cpe.s * + * Description: NDS32_COMMON board specfic define * + * (renamed CPE_ (COMMON PLATFORM ENVIRONMENT) to NDS32_COMMON_ ) * + * Author: Fred Chien * + * Update: Macpaul Lin macpaul@andestech.com * + * *************************************************************************/ + +/* + * NDS32_COMMON address map; + * + * +========================================== + * 0x00000000 | ROM + * | + * 0x00080000 |========================================== + * | SRAM + * |========================================== + * 0x10000000 | SDRAM + * 0x8FFFFFFF | + * |========================================== + * 0x90000000 |Controller's reg + * | + * |0x90100000 Arbiter/Decoder + * |0x90200000 SRAM controller reg + * |0x902ffffc Debug Numberic LED + * |0x90900000 SDRAM controller reg + * |0x90400000 DMA controller reg + * |0x90500000 AHB2APB bridge + * |0x90600000 Reserved + * |0x91000000-91F00000 DMA0-DMA15 Device; + * |0x92400000 DSP + * |0x92500000 Reserved + * |0x96500000 LCD + * |0x96600000 Bluetooth + * |0x96700000 MAC + * |0x96800000 PCI + * |0x96900000 USB2.0 host + * |0x98000000-9AFFFFFF APB Device + * 0x98000000 |========================================== + * | APB Device's Reg + * | + * |0x98000000 Reserved + * |0x98100000 Power Managemnet + * |0x98200000 UART1 + * |0x98300000 UART2/IrDA + * |0x98400000 Timer + * |0x98500000 Watchdog Timer + * |0x98600000 RTC + * |0x98700000 GPIO + * |0x98800000 INTC + * |0x98900000 UART3 + * |0x98A00000 I2C + * |0x98B00000 SSP1 + * |0x98C00000 USB Device + * |0x98D00000 Compact Flash + * |0x98E00000 Secure Digital + * |0x98F00000 SMC + * |0x99000000 MS + * |0x99100000 SCI + * |0x99200000 ECP/EPP + * |0x99300000 KBC + * |0x99400000 I2S + * |0x99500000 AC97 + * |0x99600000 SSP2 + * |0x99700000 Mouse + * |0x9AFFFFFF Reserved + * | + * +========================================== + */ + +//#include <chipset.h> +//#include <andes.h> +//#define PCLK 0 +//#define EXTCLK 1 + + +/* =============================================================================== + * NDS32_COMMON definitions + * =============================================================================== + * ------------------------------------------------------------------------------- + * Memory definitions + * ------------------------------------------------------------------------------- + */ + + +#define NDS32_COMMON_ROM_LO 0x00000000 +#define NDS32_COMMON_ROM_HI 0x80000000 +#define NDS32_COMMON_ROM_BASE NDS32_COMMON_ROM_HI /* remap position */ +#define NDS32_COMMON_ROM_SIZE SZ_128K + +#define NDS32_COMMON_SRAM_LO 0x00080000 +#define NDS32_COMMON_SRAM_HI 0x80080000 +#define NDS32_COMMON_SRAM_BASE NDS32_COMMON_SRAM_HI /* remap position */ +#define NDS32_COMMON_SRAM_SIZE SZ_512K + +#define NDS32_COMMON_SDRAM_LO 0x00000000 +#define NDS32_COMMON_SDRAM_HI 0x10000000 +#define NDS32_COMMON_SDRAM_BASE NDS32_COMMON_SDRAM_LO /* remap postion */ +#define NDS32_COMMON_SDRAM_SIZE SZ_128M + + +/* ------------------------------------------------------------------------------- + * NDS32_COMMON system registers + * ------------------------------------------------------------------------------- + */ + +#define NDS32_COMMON_DECODER_BASE 0x90100000 +#define NDS32_COMMON_SRAMC_BASE 0x90200000 + +#define SRAMBANK_BASE NDS32_COMMON_SRAM_LO + +#define NDS32_COMMON_SDRAMC_BASE 0x90300000 +#define NDS32_COMMON_DMA_BASE 0x90400000 +#define NDS32_COMMON_APB_BASE 0x90500000 + + +/* ------------------------------------------------------------------------------- + * APB Device definitions + * ------------------------------------------------------------------------------- + */ + +#define NDS32_COMMON_PWM_BASE 0x98100000 /* Power Management */ +#define NDS32_COMMON_UART1_BASE 0x99600000 /* UART 1 */ +#define NDS32_COMMON_UART2_BASE 0x98300000 /* UART 2/IrDA */ +#define NDS32_COMMON_CT_BASE 0x98400000 /* Counter/Timers */ +#define NDS32_COMMON_WATCHDOG_BASE 0x98500000 /* Watchdog Timer */ +#define NDS32_COMMON_RTC_BASE 0x98600000 /* Real Time Clock */ +#define NDS32_COMMON_GPIO_BASE 0x98700000 /* GPIO */ +#define NDS32_COMMON_IC_BASE 0x98800000 /* Interrupt Controller */ +#define NDS32_COMMON_UART3_BASE 0x98200000 /* UART 3 */ +#define NDS32_COMMON_I2C_BASE 0x98A00000 /* I2C */ +#define NDS32_COMMON_SSP1_BASE 0x98B00000 /* SSP1 */ +#define NDS32_COMMON_CF_BASE 0x98D00000 /* CF */ +#define NDS32_COMMON_SD_BASE 0x98E00000 /* SD */ +#define NDS32_COMMON_SMMC_BASE 0x98F00000 /* SMC */ +#define NDS32_COMMON_I2S_BASE 0x99400000 /* I2S */ +#define NDS32_COMMON_AC97_BASE 0x99500000 /* AC97 */ +#define NDS32_COMMON_SSP2_BASE 0x99600000 /* SSP2 */ +#define NDS32_COMMON_KBD_BASE 0x99300000 /* Keyboard */ +#define NDS32_COMMON_MOUSE_BASE 0x99b00000 /* Mouse */ +#define NDS32_COMMON_MMSC_BASE 0x99900000 /* Memory Stick */ + +#define NDS32_COMMON_TIMER1_BASE NDS32_COMMON_CT_BASE +#define NDS32_COMMON_TIMER2_BASE (NDS32_COMMON_CT_BASE + 0x10) +#define NDS32_COMMON_TIMER3_BASE (NDS32_COMMON_CT_BASE + 0x20) + + +#define SYS_CLK CONFIG_SYS_CLK_FREQ +#define AHB_CLK SYS_CLK +#define MAX_TIMER 3 +#define APB_CLK (SYS_CLK / 2) +#define DEFAULT_TICK 1 +#define PCLK_HZ (SYS_CLK/4) + + +#define NDS32_COMMON_UART_CLOCK UART_CLOCK +#define NDS32_COMMON_BAUD_115200 (NDS32_COMMON_UART_CLOCK /1843200) +#define NDS32_COMMON_BAUD_57600 (NDS32_COMMON_UART_CLOCK /921600) +#define NDS32_COMMON_BAUD_38400 (NDS32_COMMON_UART_CLOCK /614400) +#define NDS32_COMMON_BAUD_19200 (NDS32_COMMON_UART_CLOCK /307200) +#define NDS32_COMMON_BAUD_14400 (NDS32_COMMON_UART_CLOCK /230400) +#define NDS32_COMMON_BAUD_9600 (NDS32_COMMON_UART_CLOCK /153600) + + +#define HOST_COMPORT NDS32_COMMON_UART1_BASE +#define HOST_IRQBIT_NUMBER IRQ_UART1 + +/* Default port for use by Operating System or program */ +#define OS_COMPORT NDS32_COMMON_UART2_BASE +#define OS_IRQBIT_NUMBER IRQ_UART2 + +#define DEBUG_COMPORT OS_COMPORT +#define DEBUG_IRQBIT OS_IRQBIT +#define MAX_UART_NUM 2 + +/* Values to set given baud rates */ +#define DEFAULT_HOST_BAUD NDS32_COMMON_BAUD_9600 + +/* NUMBERIC DISPLAY LED */ +#define NDS32_COMMON_DBG_ALPHA 0x902ffffc + +#endif diff --git a/include/nds32_n10.h b/include/nds32_n10.h new file mode 100644 index 0000000..0a06f27 --- /dev/null +++ b/include/nds32_n10.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2010 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com + * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __NDS32_N10_H +#define __NDS32_N10_H + +#include <nds32_common.h> + +#endif diff --git a/include/nds32_n12.h b/include/nds32_n12.h new file mode 100644 index 0000000..1aa0295 --- /dev/null +++ b/include/nds32_n12.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2010 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com + * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __NDS32_N12_H +#define __NDS32_N12_H + +#include <nds32_common.h> + +#endif diff --git a/include/nds32_n9.h b/include/nds32_n9.h new file mode 100644 index 0000000..0358cac --- /dev/null +++ b/include/nds32_n9.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2010 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation nobuhiro@andestech.com + * Macpaul Lin, Andes Technology Corporation macpaul@andestech.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __NDS32_N9_H +#define __NDS32_N9_H + +#include <nds32_common.h> + +#endif