Re: [U-Boot] [RFC PATCH] arm: mx6: Clamp MMDC and DDR3 clocks for timing calculations

21 Apr 2015


      On Thu, Apr 16, 2015 at 3:36 PM, Nikolay Dimitrov picmaster@mail.bg wrote:
...
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible values for mem_speed (1333, 1600 MT/s) for
calculating the DDR timings, and uses fixed clock (528 or 400 MHz) which
doesn't take into account DDR3 memory limitations.
Signed-off-by: Nikolay Dimitrov picmaster@mail.bg
Cc: Fabio Estevam festevam@gmail.com
Cc: Stefano Babic sbabic@denx.de
Cc: Tim Harvey tharvey@gateworks.com
Cc: Eric Nelson eric.nelson@boundarydevices.com
Nikolay,
Makes sense to me.
Acked-by: Tim Harvey tharvey@gateworks.com