Stefan,
Thank you for the init.S file. But the problem still persists.
Here is what I get:
U-Boot 1.1.4 (Oct 1 2006 - 02:58:55)
CPU: AMCC PowerPC 440GX Rev. F at 800 MHz (PLB=160, OPB=80, EBC=40
MHz)
I2C boot EEPROM enabled
Internal PCI arbiter enabled
32 kB I-Cache 32 kB D-Cache
Board: Ocotea - AMCC PPC440GX Evaluation Board
I2C: ready
DRAM: DIMM slot 0: populated
DIMM slot 1: populated
DIMM slot 0: DDR SDRAM detected
DIMM slot 1: DDR SDRAM detected
DIMM 0 voltage level supported.
Finish program_cfg0
Finish program_cfg1
Finish program_rtr
tr0: 410b401a
Finish program_tr0
Finish program_bxcr Total_Size 805306368 <---- Here is part of the
problem this should return about a 1Gig of memory but it only returns
805Megs.
If I try only one dimm and move it to either slot it shows the correct
amount but with two dimms the calculation is wrong.
It seems like I am miss about two (or one) banks from the Dimm which I
assume equals 256M.
I am still working on what is causing the wrong amount.
Gerald
-----Original Message-----
From: Stefan Roese [mailto:sr@denx.de]
Sent: Sunday, October 01, 2006 2:00 PM
To: u-boot-users@lists.sourceforge.net
Cc: Gerald Jackson
Subject: Re: [U-Boot-Users] (no subject)
Hi Gerald,
On Sunday 01 October 2006 19:15, Gerald Jackson wrote:
> I look more into using both dimms issue and I see two interesting
> things.
>
> 1. With two dimms it never get pass line 1478 - 1500 in spd_sdram.c.
It
> loops once then hangs.
>
> 2. If I disable this part (ie break) I get the ERROR: Cannot determine
a
> common read delay. If I comment out the hang() It returns but it only
> calculated 768MB of memory.
Only 768MB? Does this mean you are using more than 512MB? As I mentioned
earlier, this can't work right now. The TLB setup is for a max. of
512MB.
Please try the attached init.S file. It fixes the issue mentioned by
Marc
Howard _and_ adds TLB entries for a max. of 1GB of DDR. It will be
checked
into the official git tree in a few days.
Please let me know if this changes anything.
Best regards,
Stefan
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