Re: [U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

3 Nov 2015


      On Tuesday, November 03, 2015 at 12:11:21 AM, dinguyen@opensource.altera.com 
wrote:
...
From: Dinh Nguyen dinguyen@opensource.altera.com
The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.
Signed-off-by: Dinh Nguyen dinguyen@opensource.altera.com
Thanks for finding this:
Acked-by: Marek Vasut marex@denx.de
btw. how did you find this? I doubt it was some casual reading of the source
code :)
Best regards,
Marek Vasut