Signed-off-by: Graeme Russ graeme.russ@gmail.com --- arch/nios2/cpu/interrupts.c | 38 -------------------------------------- drivers/block/mg_disk.c | 3 --- drivers/mtd/cfi_flash.c | 6 ------ 3 files changed, 0 insertions(+), 47 deletions(-)
diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c index 0a97fa6..5603894 100644 --- a/arch/nios2/cpu/interrupts.c +++ b/arch/nios2/cpu/interrupts.c @@ -54,44 +54,6 @@ static struct irq_action vecs[32]; /*************************************************************************/ volatile ulong timestamp = 0;
-void reset_timer (void) -{ - nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE; - - /* From Embedded Peripherals Handbook: - * - * "When the hardware is configured with Writeable period - * disabled, writing to one of the period_n registers causes - * the counter to reset to the fixed Timeout Period specified - * at system generation time." - * - * Here we force a reload to prevent early timeouts from - * get_timer() when the interrupt period is greater than - * than 1 msec. - * - * Simply write to periodl with its own value to force an - * internal counter reload, THEN reset the timestamp. - */ - writel (readl (&tmr->periodl), &tmr->periodl); - timestamp = 0; - - /* From Embedded Peripherals Handbook: - * - * "Writing to one of the period_n registers stops the internal - * counter, except when the hardware is configured with Start/Stop - * control bits off. If Start/Stop control bits is off, writing - * either register does not stop the counter." - * - * In order to accomodate either configuration, the control - * register is re-written. If the counter is stopped, it will - * be restarted. If it is running, the write is essentially - * a nop. - */ - writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START, - &tmr->control); - -} - ulong get_timer (ulong base) { WATCHDOG_RESET (); diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c index c8cc195..c56adfc 100644 --- a/drivers/block/mg_disk.c +++ b/drivers/block/mg_disk.c @@ -91,9 +91,6 @@ static unsigned int mg_wait (u32 expect, u32 msec) u32 ts, err;
err = MG_ERR_NONE; -#ifdef CONFIG_NIOS2 - reset_timer(); -#endif ts = time_now_ms();
status = readb(mg_base() + MG_REG_STATUS); diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index dad80c5..9918157 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -573,9 +573,6 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, #endif
/* Wait for command completion */ -#ifdef CONFIG_NIOS2 - reset_timer(); -#endif start = time_now_ms(); while (flash_is_busy (info, sector)) { if (time_since_ms(start) > tout) { @@ -664,9 +661,6 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst, #endif
/* Wait for command completion */ -#ifdef CONFIG_NIOS2 - reset_timer(); -#endif start = time_now_ms(); while (1) { switch (info->portwidth) {