Hi Wolfgang,
On Fri, Apr 1, 2011 at 6:25 PM, Wolfgang Denk wd@denx.de wrote:
Dear Lei Wen,
In message AANLkTingSAd=sQH=QbmJjvOFjVbjsCbWH0SFFyKzVrs4@mail.gmail.com you wrote:
- You say that the current implementation, which uses a writeb() call
(i. e. a byte write operation) to this register would not only affect bits 0...7, as expected, but also clear bit 9.
That is not my case. In my case, for writeb, it would affect only bits0-7, but leave bit 8 untouched. However, I need the bit 8 to be set to be 0, which is 1 at the power on.
...
Yes, that is what I want. The bit8 set to 0.
Ah. But this is completely different thing, then.
Your code would only perform this operation by accident, and this is definitely wrong. Assume some other system where this bit needs to be set to 1 - then your code would corrupt the setting.
I think my code also could handle this. They only could set the CONFIG_SYS_NS16550_REG_SIZE to be 1 and CONFIG_SYS_NS16550_MAX_REG_SIZE to be 4. Then the other bits is untouched by this driver. If CONFIG_SYS_NS16550_REG_SIZE is 4, then it would fulfill my need to clear the all other bits.
So I think:
- The current NS16550 driver behaves correctly. It sets up the
NS16550 compatible parts of your chip in the correct way, without messing with any non-standard bits.
- If you have additional, non-standard bits in your device, you must
initialize these separately. Eventually you provide a custom driver which just calls the standard NS16550 driver functions, except where you have additional need to manipulate the extra, non-standard bits of your device.
The previous version of ns16550 has the ability of control the access width according to the CONFIG_SYS_NS16550_REG_SIZE. I just don't understand why my patch is rejected for I give this back?
Best regards, Lei