On Tue, Jul 9, 2019 at 5:34 PM Andes uboot@andestech.com wrote:
From: Rick Chen rick@andestech.com
Use CCTL command to do d-cache write back and invalidate instead of fence.
Signed-off-by: Rick Chen rick@andestech.com Cc: Greentime Hu greentime@andestech.com Cc: KC Lin kclin@andestech.com
arch/riscv/cpu/ax25/cache.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c index cd95058..93f8d28 100644 --- a/arch/riscv/cpu/ax25/cache.c +++ b/arch/riscv/cpu/ax25/cache.c @@ -5,17 +5,21 @@ */
#include <common.h> +#include <asm/csr.h>
+#ifdef CONFIG_RISCV_NDS_CACHE +/* mcctlcommand */ +#define CCTL_REG_MCCTLCOMMAND_NUM 0x7cc
Please use tab before 0x7cc.
+/* D-cache operation */ +#define CCTL_L1D_WBINVAL_ALL 6 +#endif
Other than above, Reviewed-by: Bin Meng bmeng.cn@gmail.com
Regards, Bin