
21 Oct
2021
21 Oct
'21
8:52 a.m.
On 10/15/21 14:48, Michal Simek wrote:
Input frequency for sgmii is 125MHz on all Xilinx designs.
Signed-off-by: Michal Simek michal.simek@xilinx.com
arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index c893aaaafd8f..5d21795de9d0 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -46,7 +46,7 @@ si5332_1: si5332_1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>;
clock-frequency = <33333333>; /* FIXME */
clock-frequency = <125000000>;
};
si5332_2: si5332_2 { /* clk1_usb - u142 */
Applied. M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs