The driver currently does not reset bit 5 of the hostctl register even if the MMC stack requests it. Then means that once a bus width of 8 is selected it is not possible to change it back to 1. This breaks 'mmc rescan' which needs to start off with a bus width of 1.
The problem was surfaced by enabling CONFIG_DM_MMC_OPS on tegra. Without this option the MMC stack fully reinits the driver on a 'mmc rescan'. But with this option driver model does not re-probe a driver once it has been probed once.
Fix the driver to honour the request.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/mmc/tegra_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 338e42b528..7d945a172e 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -438,7 +438,7 @@ static int tegra_mmc_set_ios(struct udevice *dev) else if (mmc->bus_width == 4) ctrl |= (1 << 1); else - ctrl &= ~(1 << 1); + ctrl &= ~(1 << 1 | 1 << 5);
writeb(ctrl, &priv->reg->hostctl); debug("mmc_set_ios: hostctl = %08X\n", ctrl);