Jerry Van Baren wrote:
Liu Dave-R63238 wrote:
According to Ira, the DMA method was faster than the cpu method: "It makes the DMA initialization normal speed again. The DMA in the for loop takes the longest (as expected).
So yes, strangely it (enabling the icache) makes a HUGE difference. The total time is <3 seconds now. It is now faster than the previous CPU method."
Logically the DMA method should be faster, and Ira's results seem to reinforce this. I don't have an 83xx board to test on, so let me know if others have different results than Ira.
I did the DMA init test with the orignal DMA code. At that time The DMA method is slower than CPU method. Strange why the result is different.
Instruction cache enabled/disabled is the difference - it eliminates instruction fetches from competing with the DMA engine on the SDRAM bus. See my recent message: http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/63152/focus=63308
Oops, that isn't going to be exactly correct since we aren't running out of RAM yet so instruction fetching isn't going to compete on the SDRAM bus directly. I stand by the general theory, however, that it is bus contention of some sort - I would speculate the arbitration of the local bus to flash vs. the DMA engine to SDRAM. Logically they should be independent, but they may not be due to internal interference (both using the same internal bus?) or simplifying assumptions in the arbitrator implementation.
[snip]
Best regards, gvb