On Tue, Apr 3, 2018 at 2:00 AM, Ivan Gorinov ivan.gorinov@intel.com wrote:
On Sat, Mar 31, 2018 at 06:31:03AM -0600, Andy Shevchenko wrote:
tl = readl(regs + HPET_MAIN_COUNT_L);th = readl(regs + HPET_MAIN_COUNT_H);Ditto.
If readq() is defined as two read operations in 32-bit code, main counter rollover (low part overflow, high part increment) can happen between them.
And how this contradicts ther current code?
It just does not make the code simpler,
...b/c you misread what I suggested.
rollover check is still required if U-Boot is compiled as 32-bit code.
Can we do something like the following?
Yes, but... why?
What's wrong with replacing two sequential 32-bit reads with one 64-bit?
See below.
#ifdef CONFIG_X86_64
static u64 read_main_counter(void *regs) { return readq(regs + HPET_MAIN_COUNT); }
#else
/*
- Read the main counter as two 32-bit registers,
- repeat if rollover happens.
*/ static u64 read_main_counter(void *regs) { u64 now_tick; u32 tl, th, th0;
th = readl(regs + HPET_MAIN_COUNT_H); do {
now_tick = readq();
th0 = th; tl = readl(regs + HPET_MAIN_COUNT_L); th = readl(regs + HPET_MAIN_COUNT_H); now_tick = th; now_tick <<= 32; now_tick |= tl;
} while (th != th0);
} while (th != (now_tick >> 32));
return now_tick;}
#endif